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2020-02-13Remove MIPS support from JNI/trampoline compiler.Vladimir Marko
Also remove MIPS assembler/disassembler support. Test: aosp_taimen-userdebug boots. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Bug: 147346243 Change-Id: Id736074b97cd04987a7902741828b119508df1c0
2018-03-07MIPS: Use PCNT to implement VisitIntegerBitCount() and VisitLongBitCount()Lena Djokic
Test: ./testrunner.py --target --optimizing in QEMU Test: mma test-art-host-gtest Change-Id: I6ce5bdc86f951094f656c2f81ae8fc836d7a0b5c
2018-01-03MIPS: InstructionCodeGeneratorMIPS*::DivRemByPowerOfTwo()Lena Djokic
Replace [d]sll+[d]srl with [d]ins on R2+. Change-Id: I7587e46c47c8ce413d81a5c6c29d91e32a14d855
2017-11-08MIPS: Add asub_s/u.dfLena Djokic
These instructions are needed for implementing Sum-of-Abs-Differences visitor. Test: mma test-art-host-gtest Change-Id: Ie708f30a450b0558215f59f21bb49b68c852f247
2017-10-19MIPS: Introduce a few MSA instructionsLena Djokic
These instructions are needed for SIMD reduction. Also added assembler tests for each instruction. Test: mma test-art-host-gtest Change-Id: I0f02618a14b4cbcc3b81ce51dd2586fa4cdbfd18
2017-07-30MIPS: Eliminate hard-coded offsets in branchesAlexey Frunze
The bulk of the change is in the assemblers and their tests. The main goal is to introduce "bare" branches to labels (as opposed to the existing bare branches with relative offsets, whose direct use we want to eliminate). These branches' delay/forbidden slots are filled manually and these branches do not promote to long (the branch target must be within reach of the individual branch instruction). The secondary goal is to add more branch tests (mainly for bare vs non-bare branches and a few extra) and refactor and reorganize the branch test code a bit. The third goal is to improve idiom recognition in the disassembler, including branch idioms and a few others. Further details: - introduce bare branches (R2 and R6) to labels, making R2 branches available for use on R6 - make use of the above in the code generators - align beqz/bnez with their GNU assembler encoding to simplify and shorten the test code - update the CFI test because of the above - add trivial tests for bare and non-bare branches (addressing existing debt as well) - add MIPS32R6 tests for long beqc/beqzc/bc (debt) - add MIPS64R6 long beqzc test (debt) - group branch tests together - group constant/literal/address-loading tests together - make the disassembler recognize: - b/beqz/bnez (beq/bne with $zero reg) - nal (bltzal with $zero reg) - bal/bgezal (bal = bgezal with $zero reg) - move (or with $zero reg) - li (ori/addiu with $zero reg) - dli (daddiu with $zero reg) - disassemble 16-bit immediate operands (in andi, ori, xori, li, dli) as signed or unsigned as appropriate - drop unused instructions (bltzl, bltzall, addi) from the disassembler as there are no plans to use them Test: test-art-host-gtest Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: test-art-target-gtest Test: testrunner.py --target --optimizing Test: same tests as above on CI20 Test: booted MIPS32R2 in QEMU Change-Id: I62b74a6c00ce0651528114806ba24a59ba564a73
2017-07-25MIPS: Add maddv/msubv MSA instructionsLena Djokic
Added maddv.df, msubv.df, fmadd.df and fmsub.df MSA instructions in assembler, disassembler and tests. These instructions are needed for multiplyaccumulate support in ART Vectorizer. Test: mma test-art-host-gtest Change-Id: Idef7faaeed47f1fef83fa58676ce664afe24ffe8
2017-07-10MIPS: Print register names instead of register numbers in disassemblerGoran Jakovljevic
Test: ./testrunner.py --optimizing --target on CI20 and in QEMU Test: mma test-art-host-gtest Change-Id: I1fc375ae34ee8fd994192705c45d8f30a35dfc56
2017-06-07MIPS64: Add min/max MSA instructionsGoran Jakovljevic
Added min_s.df, max_s.df, min_u.df, max_u.df, fmin.df and fmax.df MSA instructions in assembler, disassembler and tests. These instructions are needed for min/max support in ART Vectorizer. Test: mma test-art-host-gtest Change-Id: I4e8dd18ca501ac09d938a49388e4a43116660ec9
2017-05-11MIPS64: Add ilvr.df MSA instructionsGoran Jakovljevic
These instructions are needed for compressed string support in ART Vectorizer. Test: mma test-art-host-gtest Change-Id: I269473bb8bcce5aba72201380bb71860e5498d73
2017-04-21MIPS64: Add add_a.df, ave_s/u.df and aver_s/u.df MSA instructionsGoran Jakovljevic
These instructions are needed for implementing VecAbs and VecHalvingAdd visitors. Test: mma test-art-host-gtest Change-Id: Idaec03ea32bbeaba9cb7476dd0f740aa4d9cfa70
2017-03-31MIPS64: Add ldi.df MSA instructionGoran Jakovljevic
Also fixes RepeatTemplatedRegisterImmBits template. Test: mma test-art-host-gtest Change-Id: Ib23f8a65ba924623f8c3a2d75d4ec4491d18feb0
2017-03-17Revert "Revert "Introduce a number of MSA instructions for MIPS64""Goran Jakovljevic
This reverts commit 219bf253e5158c4f3438e70864b8bf7235c1e193. Fixed memory leak in assembler_mips64_test.cc. Test: mma valgrind-test-art-host-gtest-assembler_mips64_test64 Change-Id: I238833fd4555623c2716432fc67eab7696f1e28e
2017-03-15Revert "Introduce a number of MSA instructions for MIPS64"Aart Bik
This reverts commit dcabc8b740bf3066d59348ffdf21c164d2b27cb4. Reason: FAILING TESTS valgrind-test-art-host-gtest-assembler_mips64_test32 ninja: build stopped: subcommand failed. 19:36:36 ninja failed with: exit status 1 make: *** [run_soong_ui] Error 1 Change-Id: If658375528d2a0f34bb6b22b6565fab1d863b3f5
2017-03-14Introduce a number of MSA instructions for MIPS64Goran Jakovljevic
Added a number of MSA (The MIPS SIMD Architecture) instructions. Added assembler tests for each instruction. Made necessary changes in disassembler for these instructions. Test: mma test-art-host-gtest Change-Id: I380f02c6ae5424a96ad999037153228acb07a108
2017-01-03Merge "MIPS64: java.lang.String.getChars"Treehugger Robot
2016-12-13MIPS64: Improve method invocation.Alexey Frunze
Improvements include: - support for all kinds of method loads and static/direct calls - 32-bit and 64-bit literals for the above and future work - shorter instruction sequences for recursive static/direct calls Also: - include the MIPS64 dinsu instruction (missed earlier) and minor clean-up in the disassembler - properly prefix constant names with 'k' in relative patcher tests Test: test-art-host-gtest Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: "make -j1 ART_TEST_DEFAULT_COMPILER=false ART_TEST_OPTIMIZING=true ART_TEST_INTERPRETER=false ART_TEST_JIT=false ART_TEST_PIC_TEST=true test-art-target-run-test64" Change-Id: I19876fa5316b68531af7dfddfce90d2068433116
2016-12-02MIPS64: java.lang.String.getCharsChris Larsen
Test: run-test --64 --optimizing 020-string Test: run-test --64 020-string Test: run-test --64 --no-prebuild --optimizing 020-string Test: run-test --64 --no-prebuild 020-string Test: run-test --64 --optimizing 082-inline-execute Test: run-test --64 082-inline-execute Test: run-test --64 --no-prebuild --optimizing 082-inline-execute Test: run-test --64 --no-prebuild 082-inline-execute Test: mma -j2 ART_TEST_OPTIMIZING=true test-art-target-run-test Test: mma test-art-target-gtest -j2 Test: booted MIPS64R6 emulator. Note: All tests run against MIPS64 QEMU. Change-Id: I48b9a87465f2516044a2e4f598cc5dce56b0d1c9
2016-10-20MIPS32: Implement HSelectAlexey Frunze
Test: booted MIPS32R2 in QEMU Test: test-art-target-run-test-optimizing (MIPS32R2) on CI20 Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: test-art-target-run-test-optimizing (MIPS32R6) in QEMU Test: test-art-host-gtest Change-Id: I8a8127d8d29cb5df84ed6f4fd4478f8d889e5cb7
2016-09-08ART: Detach libart-disassembler from libartAndreas Gampe
Some more intrusive changes than I would have liked, as long as ART logging is different from libbase logging. Fix up some includes. Bug: 15436106 Bug: 31338270 Test: m test-art-host Change-Id: I9fbe4b85b2d74e079a4981f3aec9af63b163a461
2016-08-19ART: Add thread offset printing hook to disassemblerAndreas Gampe
To prepare separation of disassembler from libart, add a function hook to the disassembler options for thread offset name printing. Bug: 15436106 Change-Id: I9e9b7e565ae923952c64026f675ac527b560f51b
2016-08-01ART: Convert pointer size to enumAndreas Gampe
Move away from size_t to dedicated enum (class). Bug: 30373134 Bug: 30419309 Test: m test-art-host Change-Id: Id453c330f1065012e7d4f9fc24ac477cc9bb9269
2016-07-01MIPS32: Improve method invocationAlexey Frunze
Improvements include: - CodeGeneratorMIPS::GenerateStaticOrDirectCall() supports: - MethodLoadKind::kDirectAddressWithFixup (via literals) - CodePtrLocation::kCallDirectWithFixup (via literals) - MethodLoadKind::kDexCachePcRelative - 32-bit literals to support the above (not ready for general- purpose applications yet because RA is not saved in leaf methods, but is clobbered on MIPS32R2 when simulating PC-relative addressing (MIPS32R6 is OK because it has PC-relative addressing with the lwpc instruction)) - shorter instruction sequences for recursive static/direct calls Tested: - test-art-host-gtest - test-art-target-gtest and test-art-target-run-test-optimizing on: - MIPS32R2 QEMU - CI20 board - MIPS32R6 (2nd arch) QEMU Change-Id: Id5b137ad32d5590487fd154c9a01d3b3e7e044ff
2016-06-30MIPS32: Disassemble and test movf.fmt and movt.fmt (missed earlier)Alexey Frunze
Test: ART gtest assembler_mips_test Change-Id: Iafedfafe6ccd76127461d66dfa7984f196be6bd2
2016-03-21MIPS32: Implement UnsafeCASInt and UnsafeCASObject intrinsics.Alexey Frunze
Change-Id: Ie871763b9a36075fd3d70ee6e2e241ae1ccc36cf
2016-02-10MIPS32: peek*/poke*, and String.charAt intrinsics.Chris Larsen
- byte libcore.io.Memory.peekByte(long address) - short libcore.io.Memory.peekShort(long address) - int libcore.io.Memory.peekInt(long address) - long libcore.io.Memory.peekLong(long address) - void libcore.io.Memory.pokeByte(long address, byte value) - void libcore.io.Memory.pokeShort(long address, short value) - void libcore.io.Memory.pokeInt(long address, int value) - void libcore.io.Memory.pokeLong(long address, long value) - char java.lang.String.charAt(int index) Change-Id: I5ff30b61d87313d00f0fd3f0ee09f1c454f9c9fa
2016-01-04MIPS: Implement HRorAlexey Frunze
This also fixes differentiation between the SRL and ROTR instructions in the disassembler. Change-Id: Ie19697f8d6ea8fa4e338adde3e3cf8e4a0383eae
2015-12-16MIPS32: improvements in code generation (mostly 64-bit ALU ops)Alexey Frunze
Specifically: - Use the delay slot in InvokeRuntime() for direct entry points - Use kNoOutputOverlap wherever possible - Improve and/or/xor/add/sub with 64-bit integer constants - Improve 64-bit shifts by a constant amount on R2+ - More efficient load/store of 64-bit constants (especially, 0 & +0.0) Change-Id: I86d2217c8b5b8e2a9371effc2ce38b9eec62782b
2015-12-15MIPS32: Fuse long and FP compare & condition in Optimizing.Alexey Frunze
This also does a minor clean-up in the assembler and its test. Bug: 25559148 Change-Id: I9bad3c500b592a09013b56745f70752eb284a842
2015-11-30MIPS32: int java.lang.*.numberOfLeadingZerosChris Larsen
- int java.lang.Integer.numberOfLeadingZeros(int) - int java.lang.Long.numberOfLeadingZeros(long) Change-Id: Icaf746cb807863f944ff4ebb5da6e6b2846eac58
2015-10-19MIPS64: Disassembler support for rotate instructions.Chris Larsen
Also, tighten the tests for recognizing the various shift commands. The tests, previously, would be unable to distinguish between "shift right logical" and "rotate right" commands. In particular: - SRLV vs. ROTRV - DSRLV vs. DROTRV, - DSRL vs. DROTR, and - DSRL32 vs. DROTR32 Change-Id: I7a6df8ab0d76fd3d34b1207da9915369ad84fa97
2015-10-06MIPS: Assemblers changes needed for optimizing compilerGoran Jakovljevic
Also add assembler tests for MIPS32. Change-Id: I3ab1fba7f3b06eb3b5058861946d675494a30775
2015-09-10Additional MIPS64 instructions needed by intrinsics code.Chris Larsen
Change-Id: If2a48300aac7a10dadf485d1765fb5bdeed975fe
2015-06-19MIPS: Initial version of optimizing compiler for MIPS64R6.Alexey Frunze
Bug: 21555893 Change-Id: I874dc356eee6ab061a32f8f3df5f8ac3a4ab7dcf Signed-off-by: Alexey Frunze <Alexey.Frunze@imgtec.com> Signed-off-by: Douglas Leung <douglas.leung@imgtec.com>
2015-04-09[MIPS] Refactoring code for disassemblerGoran Jakovljevic
Code for mips64 is merged with code for mips. Change-Id: I2e3f2118c69a189787ae8e7f09adb4ee5c0d00d9
2015-04-06ART: Enable more Clang warningsAndreas Gampe
Change-Id: Ie6aba02f4223b1de02530e1515c63505f37e184c
2015-03-20ART: Add Mips32r6 backend supportDouglas Leung
Add Mips32r6 compiler support. Don't use deprecated Mips32r2 instructions if running in Mips32r6 mode. Change-Id: I54e689aa8c026ccb75c4af515aa2794f471c9f67
2015-02-28ART: Fix Mips disassembler for some floating point instructions.Douglas Leung
Change-Id: I2b661a8dae4cd924c081df85f570007cf645769c
2015-01-13ART: Use jalr instead of jr for MipsAndreas Gampe
Use the jalr instruction instead of jr in stubs and compiled code. Change-Id: Idacc5167a5bb0113dc2e7716e4767e5ed07b5e0b
2014-10-22C++11 related clean-up of DISALLOW_..Ian Rogers
Move DISALLOW_COPY_AND_ASSIGN to delete functions. By no having declarations with no definitions this prompts better warning messages so deal with these by correcting the code. Add a DISALLOW_ALLOCATION and use for ValueObject and mirror::Object. Make X86 assembly operand types ValueObjects to fix compilation errors. Tidy the use of iostream and ostream. Avoid making cutils a dependency via mutex-inl.h for tests that link against libart. Push tracing dependencies into appropriate files and mutex.cc. x86 32-bit host symbols size is increased for libarttest, avoid copying this in run-test 115 by using symlinks and remove this test's higher than normal ulimit. Fix the RunningOnValgrind test in RosAllocSpace to not use GetHeap as it returns NULL when the heap is under construction by Runtime. Change-Id: Ia246f7ac0c11f73072b30d70566a196e9b78472b
2014-10-22Tidy up logging.Ian Rogers
Move gVerboseMethods to CompilerOptions. Now "--verbose-methods=" option to dex2oat rather than runtime argument "-verbose-methods:". Move ToStr and Dumpable out of logging.h, move LogMessageData into logging.cc except for a forward declaration. Remove ConstDumpable as Dump methods are all const (and make this so if not currently true). Make LogSeverity an enum and improve compile time assertions and type checking. Remove log_severity.h that's only used in logging.h. With system headers gone from logging.h, go add to .cc files missing system header includes. Also, make operator new in ValueObject private for compile time instantiation checking. Change-Id: I3228f614500ccc9b14b49c72b9821c8b0db3d641
2014-09-16Avoid printing absolute addresses in oatdumpBrian Carlstrom
- Added printing of OatClass offsets. - Added printing of OatMethod offsets. - Added bounds checks for code size size, code size, mapping table, gc map, vmap table. - Added sanity check of 100k for code size. - Added partial disassembly of questionable code. - Added --no-disassemble to disable disassembly. - Added --no-dump:vmap to disable vmap dumping. - Reordered OatMethod info to be in file order. Bug: 15567083 (cherry picked from commit 34fa79ece5b3a1940d412cd94dbdcc4225aae72f) Change-Id: I2c368f3b81af53b735149a866f3e491c9ac33fb8
2014-04-01Allow mixing of thread offsets between 32 and 64bit architectures.Ian Rogers
Begin a more full implementation x86-64 REX prefixes. Doesn't implement 64bit thread offset support for the JNI compiler. Change-Id: If9af2f08a1833c21ddb4b4077f9b03add1a05147
2014-03-14x86-64 disassembler support.Ian Rogers
Change-Id: I0ae39ae1ffdae2500ff368354f9e4702445176f0
2013-09-09Move disassembler out of runtime.Ian Rogers
Bug: 9877500. Change-Id: Ica6d9f5ecfd20c86e5230a2213827bd78cd29a29
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