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2014-11-05Support int-to-long conversions in the optimizing compiler.Roland Levillain
- Add support for the int-to-float Dex instruction in the optimizing compiler. - Add a HTypeConversion node type for control-flow graphs. - Generate x86, x86-64 and ARM (but not ARM64) code for int-to-float HTypeConversion nodes. - Add a 64-bit "Move doubleword to quadword with sign-extension" (MOVSXD) instruction to the x86-64 assembler. - Add related tests to test/422-type-conversion. Change-Id: Ieb8ec5380f9c411857119c79aa8d0728fd10f780
2014-11-05Merge "ART: More warnings"Andreas Gampe
2014-11-04ART: More warningsAndreas Gampe
Enable -Wno-conversion-null, -Wredundant-decls and -Wshadow in general, and -Wunused-but-set-parameter for GCC builds. Change-Id: I81bbdd762213444673c65d85edae594a523836e5
2014-11-04Implement CONST_CLASS in optimizing compiler.Nicolas Geoffray
Change-Id: Ia8c8dfbef87cb2f7893bfb6e178466154eec9efd
2014-11-03Remove -Wno-unused-parameter and -Wno-sign-promo from base cflags.Ian Rogers
Fix associated errors about unused paramenters and implict sign conversions. For sign conversion this was largely in the area of enums, so add ostream operators for the effected enums and fix tools/generate-operator-out.py. Tidy arena allocation code and arena allocated data types, rather than fixing new and delete operators. Remove dead code. Change-Id: I5b433e722d2f75baacfacae4d32aef4a828bfe1b
2014-10-31Merge "Support for CONST_STRING in optimizing compiler."Nicolas Geoffray
2014-10-31Support for CONST_STRING in optimizing compiler.Nicolas Geoffray
Change-Id: Iab8517bdadd1d15ffbe570010f093660be7c51aa
2014-10-30Merge "Follow-up CL after hard float changes."Nicolas Geoffray
2014-10-30Fix for long parameter passed both in stack and register.Nicolas Geoffray
Fix for long parameter passed both in stack and register on 32bits architectures. The move to hard float ABI makes it so that the register index does not necessarily match the stack index anymore. Change-Id: I26b483f68ac86d336b4a37d94c38b04917668659
2014-10-29Add support for static fields in optimizing compiler.Nicolas Geoffray
Change-Id: Id2f010589e2bd6faf42c05bb33abf6816ebe9fa9
2014-10-28[optimizing compiler] Add division for floats and doublesCalin Juravle
backends: x86, x86_64, arm. Also: - ordered instructions based on their name. - add missing kNoOutputOverlap to add/sub/mul. Change-Id: Ie47cde3b15ac74e7a1660c67a2eed1d7871f0ad0
2014-10-28Follow-up CL after hard float changes.Nicolas Geoffray
Addressing comments from Zheng Xu. Change-Id: I8c599cdfab03373e82a1b90b711005c490bc6ca0
2014-10-27Add long bitwise not instruction in the optimizing compiler.Roland Levillain
- Add support for the not-long (long integer one's complement negation) instruction in the optimizing compiler. - Add a 64-bit NOT instruction (notq) to the x86-64 assembler. - Generate ARM, x86 and x86-64 code for long HNot nodes. - Gather not-related tests in test/416-optimizing-arith-not. Change-Id: I2d5b75e9875664d6032d04f8401b2bbb84506948
2014-10-27Support hard float on arm in optimizing compiler.Nicolas Geoffray
Also bump oat version, needed after latest hard float switch. Change-Id: Idf5acfb36c07e74acff00edab998419a3c6b2965
2014-10-24Revert "Revert "Implement long negate instruction in the optimizing compiler.""Roland Levillain
This reverts commit 30ca3d847fe72cfa33e1b2473100ea2d8bea4517. Change-Id: I188ca8d460d55d3a9966bcf31e0588575afa77d2
2014-10-23Revert "Implement long negate instruction in the optimizing compiler."Roland Levillain
This reverts commit 66ce173a40eff4392e9949ede169ccf3108be2db.
2014-10-23Implement long negate instruction in the optimizing compiler.Roland Levillain
- Add support for the neg-long (long integer two's complement negate) instruction in the optimizing compiler. - Add a 64-bit NEG instruction (negq) to the x86-64 assembler. - Generate ARM, x86 and x86-64 code for integer HNeg nodes. - Put neg-related tests into test/415-optimizing-arith-neg. Change-Id: I1fbe9611e134408a6b8745d1df20ab6ffa5e50f2
2014-10-23[optimizing compiler] Add float/double subtractionCalin Juravle
- for arm, x86, x86_64 - add tests - a bit of clean up Change-Id: I3761b0d908aca3e3c5d60da481fafb423ff7c9b9
2014-10-23Implement int bit-wise not operation in the optimizing compiler.Roland Levillain
- Add support for the not-int (integer one's complement negate) instruction in the optimizing compiler. - Extend the HNot control-flow graph node type and make it inherit from HUnaryOperation. - Generate ARM, x86 and x86-64 code for integer HNeg nodes. - Exercise these additions in the codegen_test gtest, as there is not direct way to assess the support of not-int from a Java source. Indeed, compiling a Java expression such as `~a' using javac and then dx generates an xor-int/lit8 Dex instruction instead of the expected not-int Dex instruction. This is probably because the Java bytecode has an `ixor' instruction, but there's not instruction directly corresponding to a bit-wise not operation. Change-Id: I223aed75c4dac5785e04d99da0d22e8d699aee2b
2014-10-22Add multiplication for floats/doubles in optimizing compilerCalin Juravle
Change-Id: I61de8ce1d9e37e30db62e776979b3f22dc643894
2014-10-22Implement array creation related DEX instructions.Nicolas Geoffray
Implement new-array, filled-new-array, and fill-array-data. Change-Id: I405560d66777a57d881e384265322617ac5d3ce3
2014-10-22Various fixes related to integer negate operations.Roland Levillain
- Emit an RSB instruction for HNeg nodes in the ARM code generator instead of RSBS, as we do not need to update the condition code flags in this case. - Simply punt when trying to statically evaluate a long unary operation, instead of aborting. - Move a test case to the right place. Change-Id: I35eb8dea58ed35258d4d8df77181159c3ab07b6f
2014-10-21Implement register allocator for floating point registers.Nicolas Geoffray
Also: - Fix misuses of emitting the rex prefix in the x86_64 assembler. - Fix movaps code generation in the x86_64 assembler. Change-Id: Ib6dcf6e7c4a9c43368cfc46b02ba50f69ae69cbe
2014-10-21Merge "Implement int negate instruction in the optimizing compiler."Roland Levillain
2014-10-21Implement int negate instruction in the optimizing compiler.Roland Levillain
- Add support for the neg-int (integer two's complement negate) instruction in the optimizing compiler. - Add a HNeg node type for control-flow graphs and an intermediate HUnaryOperation base class. - Generate ARM, x86 and x86-64 code for integer HNeg nodes. Change-Id: I72fd3e1e5311a75c38a8cb665a9211a20325a42e
2014-10-21Remove the notion of dies at entry.Nicolas Geoffray
- Instead, explicitly say that the output does not overlap. - Inputs that must be in a fixed register do die at entry, as we know they have a location that others can not take. - There is also no need to differentiate between an input move and a connecting sibling move - those can be put in the same parallel move instruction. Change-Id: I1b2b2827906601f822b59fb9d6a21d48e43bae27
2014-10-17Add multiplication for integral typesCalin Juravle
This also fixes an issue where we could allocate a pair register even if one of its parts was already blocked. Change-Id: I4869175933409add2a56f1ccfb369c3d3dd3cb01
2014-10-16Merge "Don't use assembler classes in code_generator.h."Nicolas Geoffray
2014-10-16Don't use assembler classes in code_generator.h.Nicolas Geoffray
The arm64 backend uses its own assembler and does not share the same classes as the other backends. To avoid conflicts or unnecessary mappings, just don't use those classes in the shared part of the code generator. Change-Id: I9e5fa40c1021d2e83a4ef14c52cd1ccd03f2f73d
2014-10-14Turn constant conditional jumps into unconditional jumps.Roland Levillain
If a condition (input of an art::HIf instruction) is constant (an art::HConstant object), evaluate it at compile time and generate an unconditional branch instruction if it is true (in lieu of a conditional jump). Change-Id: I262e43ffe66d5c25dbbfa98092a41c8b3c4c75d6
2014-10-13Merge "Use Is*() helpers to shorten code in the optimizing compiler."Roland Levillain
2014-10-10Cleanup baseline register allocator.Nicolas Geoffray
- Use three arrays for blocking regsters instead of one and computing offsets in that array.] - Don't pass blocked_registers_ to methods, just use the field. Change-Id: Ib698564c31127c59b5a64c80f4262394b8394dc6
2014-10-10Merge "Fix code generation of materialized conditions."Nicolas Geoffray
2014-10-09Enable -Wimplicit-fallthrough.Ian Rogers
Falling through switch cases on a clang build must now annotate the fallthrough with the FALLTHROUGH_INTENDED macro. Bug: 17731372 Change-Id: I836451cd5f96b01d1ababdbf9eef677fe8fa8324
2014-10-09Use Is*() helpers to shorten code in the optimizing compiler.Roland Levillain
Change-Id: I79f31833bc9a0aa2918381aa3fb0b05d45f75689
2014-10-09Fix code generation of materialized conditions.Nicolas Geoffray
Move the logic for knowing if a condition needs to be materialized in an optimization pass (so that the information does not change as a side effect of another optimization). Also clean-up arm and x86_64 codegen: - arm: ldr and str are for power-users when a constant is in play. We should use LoadFromOffset and StoreToOffset. - x86_64: fix misuses of movq instead of movl. Change-Id: I01a03b91803624be2281a344a13ad5efbf4f3ef3
2014-10-09Stop converting from Location to ManagedRegister.Nicolas Geoffray
Now the source of truth is the Location object that knows which register (core, pair, fpu) it needs to refer to. Change-Id: I62401343d7479ecfb24b5ed161ec7829cda5a0b1
2014-10-08Header file clean up.Ian Rogers
Remove runtime.h from object.h. Move TypeStaticIf to its own header file to avoid bringing utils.h into allocator.h. Move Array::DataOffset into -inl.h as it now has a utils.h dependency. Fix include issues arising from this. Change-Id: I4605b1aa4ff5f8dc15706a0132e15df03c7c8ba0
2014-10-07Add trivial register hints to the register allocator.Nicolas Geoffray
- Add hints for phis, same as first input, and expected registers. - Make the if instruction accept non-condition instructions. Change-Id: I34fa68393f0d0c19c68128f017b7a05be556fbe5
2014-10-07Add support for floats and doubles.Nicolas Geoffray
- Follows Quick conventions. - Currently only works with baseline register allocator. Change-Id: Ie4b8e298f4f5e1cd82364da83e4344d4fc3621a3
2014-10-06Add a prepare for register allocation pass.Nicolas Geoffray
- Currently the pass just changes the uses of checks to the actual values. - Also optimize array access, now that inputs can be constants. - And fix another bug in the register allocator reveiled by this change. Change-Id: I43be0dbde9330ee5c8f9d678de11361292d8bd98
2014-10-06Add support for inputs dying at entry of instructions.Nicolas Geoffray
- Start using it in places where it makes sense. - Also improve suspend check on arm to use subs directly. Change-Id: I09ac0589f5ccb9b850ee757c76dcbcf35ee8cd01
2014-09-25Merge "Optimize suspend checks in optimizing compiler."Nicolas Geoffray
2014-09-25Optimizing compiler: remove unnecessary `explicit' keywords.Roland Levillain
Change-Id: I5927fd92d53308c81e14edbd6e7d1c943bfa085b
2014-09-25Optimize suspend checks in optimizing compiler.Nicolas Geoffray
- Remove the ones added during graph build (they were added for the baseline code generator). - Emit them at loop back edges after phi moves, so that the test can directly jump to the loop header. - Fix x86 and x86_64 suspend check by using cmpw instead of cmpl. Change-Id: I6fad5795a55705d86c9e1cb85bf5d63dadfafa2a
2014-09-23Merge "Support for saving and restoring live registers in a slow path."Nicolas Geoffray
2014-09-23Support for saving and restoring live registers in a slow path.Nicolas Geoffray
And use it in suspend check slow paths. Change-Id: I79caf28f334c145a36180c79a6e2fceae3990c31
2014-09-23Fix code generation with materialized conditions.Nicolas Geoffray
Change-Id: I8630af3c13fc1950d3fa718d7488407b00898796
2014-09-17Implement invoke virtual in optimizing compiler.Nicolas Geoffray
Also refactor 004 tests to make them work with both Quick and Optimizing. Change-Id: I87e275cb0ae0258fc3bb32b612140000b1d2adf8
2014-09-16Revert "Revert "Implement suspend checks in new compiler.""Nicolas Geoffray
This reverts commit 7e3652c45c30c1f2f840e6088e24e2db716eaea7. Change-Id: Ib489440c34e41cba9e9e297054f9274f6e81a2d8
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