diff options
author | Nicolas Geoffray <ngeoffray@google.com> | 2014-10-30 18:20:07 +0000 |
---|---|---|
committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2014-10-30 18:20:07 +0000 |
commit | 26dcecb0ef620fb225cd5dd39f6e41b07e34c83d (patch) | |
tree | 5f4d8b1584059dc9570be48030fe4c6aad82457b /compiler/optimizing/code_generator_arm.cc | |
parent | 29ce77f654412dbb5fb3d5949da4053952917101 (diff) | |
parent | 3c03503d66df3b4440f851ae7d0c4fae5e7872df (diff) |
Merge "Follow-up CL after hard float changes."
Diffstat (limited to 'compiler/optimizing/code_generator_arm.cc')
-rw-r--r-- | compiler/optimizing/code_generator_arm.cc | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/compiler/optimizing/code_generator_arm.cc b/compiler/optimizing/code_generator_arm.cc index 0f14436539..9ed19695a3 100644 --- a/compiler/optimizing/code_generator_arm.cc +++ b/compiler/optimizing/code_generator_arm.cc @@ -296,7 +296,8 @@ Location CodeGeneratorARM::AllocateFreeRegister(Primitive::Type type) const { } case Primitive::kPrimDouble: { - int reg = FindTwoFreeConsecutiveEntries(blocked_fpu_registers_, kNumberOfSRegisters); + int reg = FindTwoFreeConsecutiveAlignedEntries(blocked_fpu_registers_, kNumberOfSRegisters); + DCHECK_EQ(reg % 2, 0); return Location::FpuRegisterPairLocation(reg, reg + 1); } @@ -341,6 +342,14 @@ void CodeGeneratorARM::SetupBlockedRegisters() const { blocked_fpu_registers_[S21] = true; blocked_fpu_registers_[S22] = true; blocked_fpu_registers_[S23] = true; + blocked_fpu_registers_[S24] = true; + blocked_fpu_registers_[S25] = true; + blocked_fpu_registers_[S26] = true; + blocked_fpu_registers_[S27] = true; + blocked_fpu_registers_[S28] = true; + blocked_fpu_registers_[S29] = true; + blocked_fpu_registers_[S30] = true; + blocked_fpu_registers_[S31] = true; UpdateBlockedPairRegisters(); } |