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authorMark Mendell <mark.p.mendell@intel.com>2015-09-15 21:45:01 -0400
committerMark Mendell <mark.p.mendell@intel.com>2015-09-15 21:45:01 -0400
commitbcee092d7b0cbb7181d428115ad98d25ce844061 (patch)
treedab00e7f7dc19b002948020a8c2cbde665203c0e /disassembler/disassembler_x86.cc
parentb505997b2176bd29a108cb6c33d06d4ef29ba001 (diff)
Add X86 bsf and rotate instructions
These are for use in new intrinsics. Bsf (Bit Scan Forward) is used in {Long,Integer}NumberOfTrailingZeros and the rotates are used in {Long,Integer}Rotate{Left,Right}. Change-Id: Icb599d7e1eec4e4ea9e5b4f0b1654c7b8d4de678 Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
Diffstat (limited to 'disassembler/disassembler_x86.cc')
-rw-r--r--disassembler/disassembler_x86.cc5
1 files changed, 5 insertions, 0 deletions
diff --git a/disassembler/disassembler_x86.cc b/disassembler/disassembler_x86.cc
index d4574f4f0a..d4bef0fe7b 100644
--- a/disassembler/disassembler_x86.cc
+++ b/disassembler/disassembler_x86.cc
@@ -928,6 +928,11 @@ DISASSEMBLER_ENTRY(cmp,
has_modrm = true;
load = true;
break;
+ case 0xBC:
+ opcode1 = "bsf";
+ has_modrm = true;
+ load = true;
+ break;
case 0xBD:
opcode1 = "bsr";
has_modrm = true;