diff options
| author | Goran Jakovljevic <Goran.Jakovljevic@imgtec.com> | 2017-10-23 08:58:15 +0200 |
|---|---|---|
| committer | Goran Jakovljevic <Goran.Jakovljevic@imgtec.com> | 2017-10-23 08:58:15 +0200 |
| commit | 2e61a57988a9172d446a1638bbd61d94c86ed4d9 (patch) | |
| tree | d39b3405dcfadeb19e2c8cf64c082e2b9a693013 /compiler/optimizing/code_generator_mips.cc | |
| parent | 59c5dfe792d3288c5df75a035f6614cb228d7352 (diff) | |
MIPS32: Do implicit null check properly
This fixes 122-npe test failure in debuggable mode for MIPS32.
Test: ./testrunner.py --target --optimizing --debuggable --ndebuggable on CI20
Change-Id: I7c5c1e72a92f29e750265b612079ab0bac2a1dc0
Diffstat (limited to 'compiler/optimizing/code_generator_mips.cc')
| -rw-r--r-- | compiler/optimizing/code_generator_mips.cc | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/compiler/optimizing/code_generator_mips.cc b/compiler/optimizing/code_generator_mips.cc index 893692a04d..3ba107a283 100644 --- a/compiler/optimizing/code_generator_mips.cc +++ b/compiler/optimizing/code_generator_mips.cc @@ -6244,8 +6244,11 @@ void InstructionCodeGeneratorMIPS::HandleFieldGet(HInstruction* instruction, InvokeRuntimeCallingConvention calling_convention; __ Addiu32(locations->GetTemp(0).AsRegister<Register>(), obj, offset); // Do implicit Null check - __ Lw(ZERO, locations->GetTemp(0).AsRegister<Register>(), 0); - codegen_->RecordPcInfo(instruction, instruction->GetDexPc()); + __ LoadFromOffset(kLoadWord, + ZERO, + locations->GetTemp(0).AsRegister<Register>(), + 0, + null_checker); codegen_->InvokeRuntime(kQuickA64Load, instruction, dex_pc); CheckEntrypointTypes<kQuickA64Load, int64_t, volatile const int64_t*>(); if (type == DataType::Type::kFloat64) { @@ -6398,8 +6401,11 @@ void InstructionCodeGeneratorMIPS::HandleFieldSet(HInstruction* instruction, InvokeRuntimeCallingConvention calling_convention; __ Addiu32(locations->GetTemp(0).AsRegister<Register>(), obj, offset); // Do implicit Null check. - __ Lw(ZERO, locations->GetTemp(0).AsRegister<Register>(), 0); - codegen_->RecordPcInfo(instruction, instruction->GetDexPc()); + __ LoadFromOffset(kLoadWord, + ZERO, + locations->GetTemp(0).AsRegister<Register>(), + 0, + null_checker); if (type == DataType::Type::kFloat64) { // Pass FP parameters in core registers. if (value_location.IsFpuRegister()) { |