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diff --git a/share/doc/gcc/FRV-Options.html b/share/doc/gcc/FRV-Options.html new file mode 100644 index 0000000..decc257 --- /dev/null +++ b/share/doc/gcc/FRV-Options.html @@ -0,0 +1,450 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd"> +<html> +<!-- This file documents the use of the GNU compilers. + +Copyright (C) 1988-2023 Free Software Foundation, Inc. + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License, Version 1.3 or +any later version published by the Free Software Foundation; with the +Invariant Sections being "Funding Free Software", the Front-Cover +Texts being (a) (see below), and with the Back-Cover Texts being (b) +(see below). A copy of the license is included in the section entitled +"GNU Free Documentation License". + +(a) The FSF's Front-Cover Text is: + +A GNU Manual + +(b) The FSF's Back-Cover Text is: + +You have freedom to copy and modify this GNU Manual, like GNU + software. Copies published by the Free Software Foundation raise + funds for GNU development. --> +<!-- Created by GNU Texinfo 5.1, http://www.gnu.org/software/texinfo/ --> +<head> +<title>Using the GNU Compiler Collection (GCC): FRV Options</title> + +<meta name="description" content="Using the GNU Compiler Collection (GCC): FRV Options"> +<meta name="keywords" content="Using the GNU Compiler Collection (GCC): FRV Options"> +<meta name="resource-type" content="document"> +<meta name="distribution" content="global"> +<meta name="Generator" content="makeinfo"> +<meta http-equiv="Content-Type" content="text/html; charset=utf-8"> +<link href="index.html#Top" rel="start" title="Top"> +<link href="Indices.html#Indices" rel="index" title="Indices"> +<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents"> +<link href="Submodel-Options.html#Submodel-Options" rel="up" title="Submodel Options"> +<link href="GNU_002fLinux-Options.html#GNU_002fLinux-Options" rel="next" title="GNU/Linux Options"> +<link href="FT32-Options.html#FT32-Options" rel="previous" title="FT32 Options"> +<style type="text/css"> +<!-- +a.summary-letter {text-decoration: none} +blockquote.smallquotation {font-size: smaller} +div.display {margin-left: 3.2em} +div.example {margin-left: 3.2em} +div.indentedblock {margin-left: 3.2em} +div.lisp {margin-left: 3.2em} +div.smalldisplay {margin-left: 3.2em} +div.smallexample {margin-left: 3.2em} +div.smallindentedblock {margin-left: 3.2em; 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Without any PIC/PIE-related options, it +implies <samp>-fPIE</samp>. With <samp>-fpic</samp> or <samp>-fpie</samp>, it +assumes GOT entries and small data are within a 12-bit range from the +GOT base address; with <samp>-fPIC</samp> or <samp>-fPIE</samp>, GOT offsets +are computed with 32 bits. +With a ‘<samp>bfin-elf</samp>’ target, this option implies <samp>-msim</samp>. +</p> +<a name="index-minline_002dplt-1"></a> +</dd> +<dt><code>-minline-plt</code></dt> +<dd> +<p>Enable inlining of PLT entries in function calls to functions that are +not known to bind locally. It has no effect without <samp>-mfdpic</samp>. +It’s enabled by default if optimizing for speed and compiling for +shared libraries (i.e., <samp>-fPIC</samp> or <samp>-fpic</samp>), or when an +optimization option such as <samp>-O3</samp> or above is present in the +command line. +</p> +<a name="index-mTLS"></a> +</dd> +<dt><code>-mTLS</code></dt> +<dd> +<p>Assume a large TLS segment when generating thread-local code. +</p> +<a name="index-mtls"></a> +</dd> +<dt><code>-mtls</code></dt> +<dd> +<p>Do not assume a large TLS segment when generating thread-local code. +</p> +<a name="index-mgprel_002dro"></a> +</dd> +<dt><code>-mgprel-ro</code></dt> +<dd> +<p>Enable the use of <code>GPREL</code> relocations in the FDPIC ABI for data +that is known to be in read-only sections. It’s enabled by default, +except for <samp>-fpic</samp> or <samp>-fpie</samp>: even though it may help +make the global offset table smaller, it trades 1 instruction for 4. +With <samp>-fPIC</samp> or <samp>-fPIE</samp>, it trades 3 instructions for 4, +one of which may be shared by multiple symbols, and it avoids the need +for a GOT entry for the referenced symbol, so it’s more likely to be a +win. If it is not, <samp>-mno-gprel-ro</samp> can be used to disable it. +</p> +<a name="index-multilib_002dlibrary_002dpic"></a> +</dd> +<dt><code>-multilib-library-pic</code></dt> +<dd> +<p>Link with the (library, not FD) pic libraries. It’s implied by +<samp>-mlibrary-pic</samp>, as well as by <samp>-fPIC</samp> and +<samp>-fpic</samp> without <samp>-mfdpic</samp>. You should never have to use +it explicitly. +</p> +<a name="index-mlinked_002dfp"></a> +</dd> +<dt><code>-mlinked-fp</code></dt> +<dd> +<p>Follow the EABI requirement of always creating a frame pointer whenever +a stack frame is allocated. This option is enabled by default and can +be disabled with <samp>-mno-linked-fp</samp>. +</p> +<a name="index-mlong_002dcalls-4"></a> +</dd> +<dt><code>-mlong-calls</code></dt> +<dd> +<p>Use indirect addressing to call functions outside the current +compilation unit. This allows the functions to be placed anywhere +within the 32-bit address space. +</p> +<a name="index-malign_002dlabels"></a> +</dd> +<dt><code>-malign-labels</code></dt> +<dd> +<p>Try to align labels to an 8-byte boundary by inserting NOPs into the +previous packet. This option only has an effect when VLIW packing +is enabled. It doesn’t create new packets; it merely adds NOPs to +existing ones. +</p> +<a name="index-mlibrary_002dpic"></a> +</dd> +<dt><code>-mlibrary-pic</code></dt> +<dd> +<p>Generate position-independent EABI code. +</p> +<a name="index-macc_002d4"></a> +</dd> +<dt><code>-macc-4</code></dt> +<dd> +<p>Use only the first four media accumulator registers. +</p> +<a name="index-macc_002d8"></a> +</dd> +<dt><code>-macc-8</code></dt> +<dd> +<p>Use all eight media accumulator registers. +</p> +<a name="index-mpack"></a> +</dd> +<dt><code>-mpack</code></dt> +<dd> +<p>Pack VLIW instructions. +</p> +<a name="index-mno_002dpack"></a> +</dd> +<dt><code>-mno-pack</code></dt> +<dd> +<p>Do not pack VLIW instructions. +</p> +<a name="index-mno_002deflags"></a> +</dd> +<dt><code>-mno-eflags</code></dt> +<dd> +<p>Do not mark ABI switches in e_flags. +</p> +<a name="index-mcond_002dmove"></a> +</dd> +<dt><code>-mcond-move</code></dt> +<dd> +<p>Enable the use of conditional-move instructions (default). +</p> +<p>This switch is mainly for debugging the compiler and will likely be removed +in a future version. +</p> +<a name="index-mno_002dcond_002dmove"></a> +</dd> +<dt><code>-mno-cond-move</code></dt> +<dd> +<p>Disable the use of conditional-move instructions. +</p> +<p>This switch is mainly for debugging the compiler and will likely be removed +in a future version. +</p> +<a name="index-mscc"></a> +</dd> +<dt><code>-mscc</code></dt> +<dd> +<p>Enable the use of conditional set instructions (default). +</p> +<p>This switch is mainly for debugging the compiler and will likely be removed +in a future version. +</p> +<a name="index-mno_002dscc"></a> +</dd> +<dt><code>-mno-scc</code></dt> +<dd> +<p>Disable the use of conditional set instructions. +</p> +<p>This switch is mainly for debugging the compiler and will likely be removed +in a future version. +</p> +<a name="index-mcond_002dexec"></a> +</dd> +<dt><code>-mcond-exec</code></dt> +<dd> +<p>Enable the use of conditional execution (default). +</p> +<p>This switch is mainly for debugging the compiler and will likely be removed +in a future version. +</p> +<a name="index-mno_002dcond_002dexec-1"></a> +</dd> +<dt><code>-mno-cond-exec</code></dt> +<dd> +<p>Disable the use of conditional execution. +</p> +<p>This switch is mainly for debugging the compiler and will likely be removed +in a future version. +</p> +<a name="index-mvliw_002dbranch"></a> +</dd> +<dt><code>-mvliw-branch</code></dt> +<dd> +<p>Run a pass to pack branches into VLIW instructions (default). +</p> +<p>This switch is mainly for debugging the compiler and will likely be removed +in a future version. +</p> +<a name="index-mno_002dvliw_002dbranch"></a> +</dd> +<dt><code>-mno-vliw-branch</code></dt> +<dd> +<p>Do not run a pass to pack branches into VLIW instructions. +</p> +<p>This switch is mainly for debugging the compiler and will likely be removed +in a future version. +</p> +<a name="index-mmulti_002dcond_002dexec"></a> +</dd> +<dt><code>-mmulti-cond-exec</code></dt> +<dd> +<p>Enable optimization of <code>&&</code> and <code>||</code> in conditional execution +(default). +</p> +<p>This switch is mainly for debugging the compiler and will likely be removed +in a future version. +</p> +<a name="index-mno_002dmulti_002dcond_002dexec"></a> +</dd> +<dt><code>-mno-multi-cond-exec</code></dt> +<dd> +<p>Disable optimization of <code>&&</code> and <code>||</code> in conditional execution. +</p> +<p>This switch is mainly for debugging the compiler and will likely be removed +in a future version. +</p> +<a name="index-mnested_002dcond_002dexec"></a> +</dd> +<dt><code>-mnested-cond-exec</code></dt> +<dd> +<p>Enable nested conditional execution optimizations (default). +</p> +<p>This switch is mainly for debugging the compiler and will likely be removed +in a future version. +</p> +<a name="index-mno_002dnested_002dcond_002dexec"></a> +</dd> +<dt><code>-mno-nested-cond-exec</code></dt> +<dd> +<p>Disable nested conditional execution optimizations. +</p> +<p>This switch is mainly for debugging the compiler and will likely be removed +in a future version. +</p> +<a name="index-moptimize_002dmembar"></a> +</dd> +<dt><code>-moptimize-membar</code></dt> +<dd> +<p>This switch removes redundant <code>membar</code> instructions from the +compiler-generated code. It is enabled by default. +</p> +<a name="index-mno_002doptimize_002dmembar"></a> +<a name="index-moptimize_002dmembar-1"></a> +</dd> +<dt><code>-mno-optimize-membar</code></dt> +<dd> +<p>This switch disables the automatic removal of redundant <code>membar</code> +instructions from the generated code. +</p> +<a name="index-mtomcat_002dstats"></a> +</dd> +<dt><code>-mtomcat-stats</code></dt> +<dd> +<p>Cause gas to print out tomcat statistics. +</p> +<a name="index-mcpu-6"></a> +</dd> +<dt><code>-mcpu=<var>cpu</var></code></dt> +<dd> +<p>Select the processor type for which to generate code. Possible values are +‘<samp>frv</samp>’, ‘<samp>fr550</samp>’, ‘<samp>tomcat</samp>’, ‘<samp>fr500</samp>’, ‘<samp>fr450</samp>’, +‘<samp>fr405</samp>’, ‘<samp>fr400</samp>’, ‘<samp>fr300</samp>’ and ‘<samp>simple</samp>’. +</p> +</dd> +</dl> + +<hr> +<div class="header"> +<p> +Next: <a href="GNU_002fLinux-Options.html#GNU_002fLinux-Options" accesskey="n" rel="next">GNU/Linux Options</a>, Previous: <a href="FT32-Options.html#FT32-Options" accesskey="p" rel="previous">FT32 Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Indices.html#Indices" title="Index" rel="index">Index</a>]</p> +</div> + + + +</body> +</html> |