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+<a name="AArch64-Function-Attributes"></a>
+<div class="header">
+<p>
+Next: <a href="AMD-GCN-Function-Attributes.html#AMD-GCN-Function-Attributes" accesskey="n" rel="next">AMD GCN Function Attributes</a>, Previous: <a href="Common-Function-Attributes.html#Common-Function-Attributes" accesskey="p" rel="previous">Common Function Attributes</a>, Up: <a href="Function-Attributes.html#Function-Attributes" accesskey="u" rel="up">Function Attributes</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Indices.html#Indices" title="Index" rel="index">Index</a>]</p>
+</div>
+<hr>
+<a name="AArch64-Function-Attributes-1"></a>
+<h4 class="subsection">6.33.2 AArch64 Function Attributes</h4>
+
+<p>The following target-specific function attributes are available for the
+AArch64 target. For the most part, these options mirror the behavior of
+similar command-line options (see <a href="AArch64-Options.html#AArch64-Options">AArch64 Options</a>), but on a
+per-function basis.
+</p>
+<dl compact="compact">
+<dd><a name="index-general_002dregs_002donly-function-attribute_002c-AArch64"></a>
+</dd>
+<dt><code>general-regs-only</code></dt>
+<dd><p>Indicates that no floating-point or Advanced SIMD registers should be
+used when generating code for this function. If the function explicitly
+uses floating-point code, then the compiler gives an error. This is
+the same behavior as that of the command-line option
+<samp>-mgeneral-regs-only</samp>.
+</p>
+<a name="index-fix_002dcortex_002da53_002d835769-function-attribute_002c-AArch64"></a>
+</dd>
+<dt><code>fix-cortex-a53-835769</code></dt>
+<dd><p>Indicates that the workaround for the Cortex-A53 erratum 835769 should be
+applied to this function. To explicitly disable the workaround for this
+function specify the negated form: <code>no-fix-cortex-a53-835769</code>.
+This corresponds to the behavior of the command line options
+<samp>-mfix-cortex-a53-835769</samp> and <samp>-mno-fix-cortex-a53-835769</samp>.
+</p>
+<a name="index-cmodel_003d-function-attribute_002c-AArch64"></a>
+</dd>
+<dt><code>cmodel=</code></dt>
+<dd><p>Indicates that code should be generated for a particular code model for
+this function. The behavior and permissible arguments are the same as
+for the command line option <samp>-mcmodel=</samp>.
+</p>
+<a name="index-strict_002dalign-function-attribute_002c-AArch64"></a>
+</dd>
+<dt><code>strict-align</code></dt>
+<dt><code>no-strict-align</code></dt>
+<dd><p><code>strict-align</code> indicates that the compiler should not assume that unaligned
+memory references are handled by the system. To allow the compiler to assume
+that aligned memory references are handled by the system, the inverse attribute
+<code>no-strict-align</code> can be specified. The behavior is same as for the
+command-line option <samp>-mstrict-align</samp> and <samp>-mno-strict-align</samp>.
+</p>
+<a name="index-omit_002dleaf_002dframe_002dpointer-function-attribute_002c-AArch64"></a>
+</dd>
+<dt><code>omit-leaf-frame-pointer</code></dt>
+<dd><p>Indicates that the frame pointer should be omitted for a leaf function call.
+To keep the frame pointer, the inverse attribute
+<code>no-omit-leaf-frame-pointer</code> can be specified. These attributes have
+the same behavior as the command-line options <samp>-momit-leaf-frame-pointer</samp>
+and <samp>-mno-omit-leaf-frame-pointer</samp>.
+</p>
+<a name="index-tls_002ddialect_003d-function-attribute_002c-AArch64"></a>
+</dd>
+<dt><code>tls-dialect=</code></dt>
+<dd><p>Specifies the TLS dialect to use for this function. The behavior and
+permissible arguments are the same as for the command-line option
+<samp>-mtls-dialect=</samp>.
+</p>
+<a name="index-arch_003d-function-attribute_002c-AArch64"></a>
+</dd>
+<dt><code>arch=</code></dt>
+<dd><p>Specifies the architecture version and architectural extensions to use
+for this function. The behavior and permissible arguments are the same as
+for the <samp>-march=</samp> command-line option.
+</p>
+<a name="index-tune_003d-function-attribute_002c-AArch64"></a>
+</dd>
+<dt><code>tune=</code></dt>
+<dd><p>Specifies the core for which to tune the performance of this function.
+The behavior and permissible arguments are the same as for the <samp>-mtune=</samp>
+command-line option.
+</p>
+<a name="index-cpu_003d-function-attribute_002c-AArch64"></a>
+</dd>
+<dt><code>cpu=</code></dt>
+<dd><p>Specifies the core for which to tune the performance of this function and also
+whose architectural features to use. The behavior and valid arguments are the
+same as for the <samp>-mcpu=</samp> command-line option.
+</p>
+<a name="index-sign_002dreturn_002daddress-function-attribute_002c-AArch64"></a>
+</dd>
+<dt><code>sign-return-address</code></dt>
+<dd><p>Select the function scope on which return address signing will be applied. The
+behavior and permissible arguments are the same as for the command-line option
+<samp>-msign-return-address=</samp>. The default value is <code>none</code>. This
+attribute is deprecated. The <code>branch-protection</code> attribute should
+be used instead.
+</p>
+<a name="index-branch_002dprotection-function-attribute_002c-AArch64"></a>
+</dd>
+<dt><code>branch-protection</code></dt>
+<dd><p>Select the function scope on which branch protection will be applied. The
+behavior and permissible arguments are the same as for the command-line option
+<samp>-mbranch-protection=</samp>. The default value is <code>none</code>.
+</p>
+<a name="index-outline_002datomics-function-attribute_002c-AArch64"></a>
+</dd>
+<dt><code>outline-atomics</code></dt>
+<dd><p>Enable or disable calls to out-of-line helpers to implement atomic operations.
+This corresponds to the behavior of the command line options
+<samp>-moutline-atomics</samp> and <samp>-mno-outline-atomics</samp>.
+</p>
+</dd>
+</dl>
+
+<p>The above target attributes can be specified as follows:
+</p>
+<div class="smallexample">
+<pre class="smallexample">__attribute__((target(&quot;<var>attr-string</var>&quot;)))
+int
+f (int a)
+{
+ return a + 5;
+}
+</pre></div>
+
+<p>where <code><var>attr-string</var></code> is one of the attribute strings specified above.
+</p>
+<p>Additionally, the architectural extension string may be specified on its
+own. This can be used to turn on and off particular architectural extensions
+without having to specify a particular architecture version or core. Example:
+</p>
+<div class="smallexample">
+<pre class="smallexample">__attribute__((target(&quot;+crc+nocrypto&quot;)))
+int
+foo (int a)
+{
+ return a + 5;
+}
+</pre></div>
+
+<p>In this example <code>target(&quot;+crc+nocrypto&quot;)</code> enables the <code>crc</code>
+extension and disables the <code>crypto</code> extension for the function <code>foo</code>
+without modifying an existing <samp>-march=</samp> or <samp>-mcpu</samp> option.
+</p>
+<p>Multiple target function attributes can be specified by separating them with
+a comma. For example:
+</p><div class="smallexample">
+<pre class="smallexample">__attribute__((target(&quot;arch=armv8-a+crc+crypto,tune=cortex-a53&quot;)))
+int
+foo (int a)
+{
+ return a + 5;
+}
+</pre></div>
+
+<p>is valid and compiles function <code>foo</code> for ARMv8-A with <code>crc</code>
+and <code>crypto</code> extensions and tunes it for <code>cortex-a53</code>.
+</p>
+<a name="Inlining-rules"></a>
+<h4 class="subsubsection">6.33.2.1 Inlining rules</h4>
+<p>Specifying target attributes on individual functions or performing link-time
+optimization across translation units compiled with different target options
+can affect function inlining rules:
+</p>
+<p>In particular, a caller function can inline a callee function only if the
+architectural features available to the callee are a subset of the features
+available to the caller.
+For example: A function <code>foo</code> compiled with <samp>-march=armv8-a+crc</samp>,
+or tagged with the equivalent <code>arch=armv8-a+crc</code> attribute,
+can inline a function <code>bar</code> compiled with <samp>-march=armv8-a+nocrc</samp>
+because the all the architectural features that function <code>bar</code> requires
+are available to function <code>foo</code>. Conversely, function <code>bar</code> cannot
+inline function <code>foo</code>.
+</p>
+<p>Additionally inlining a function compiled with <samp>-mstrict-align</samp> into a
+function compiled without <code>-mstrict-align</code> is not allowed.
+However, inlining a function compiled without <samp>-mstrict-align</samp> into a
+function compiled with <samp>-mstrict-align</samp> is allowed.
+</p>
+<p>Note that CPU tuning options and attributes such as the <samp>-mcpu=</samp>,
+<samp>-mtune=</samp> do not inhibit inlining unless the CPU specified by the
+<samp>-mcpu=</samp> option or the <code>cpu=</code> attribute conflicts with the
+architectural feature rules specified above.
+</p>
+<hr>
+<div class="header">
+<p>
+Next: <a href="AMD-GCN-Function-Attributes.html#AMD-GCN-Function-Attributes" accesskey="n" rel="next">AMD GCN Function Attributes</a>, Previous: <a href="Common-Function-Attributes.html#Common-Function-Attributes" accesskey="p" rel="previous">Common Function Attributes</a>, Up: <a href="Function-Attributes.html#Function-Attributes" accesskey="u" rel="up">Function Attributes</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Indices.html#Indices" title="Index" rel="index">Index</a>]</p>
+</div>
+
+
+
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+</html>