diff options
| author | alk3pInjection <webmaster@raspii.tech> | 2024-02-04 16:16:35 +0800 |
|---|---|---|
| committer | alk3pInjection <webmaster@raspii.tech> | 2024-02-04 16:16:35 +0800 |
| commit | abdaadbcae30fe0c9a66c7516798279fdfd97750 (patch) | |
| tree | 00a54a6e25601e43876d03c1a4a12a749d4a914c /share/doc/gcc/x86-Function-Attributes.html | |
https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads
Change-Id: I7303388733328cd98ab9aa3c30236db67f2e9e9c
Diffstat (limited to 'share/doc/gcc/x86-Function-Attributes.html')
| -rw-r--r-- | share/doc/gcc/x86-Function-Attributes.html | 1106 |
1 files changed, 1106 insertions, 0 deletions
diff --git a/share/doc/gcc/x86-Function-Attributes.html b/share/doc/gcc/x86-Function-Attributes.html new file mode 100644 index 0000000..06b025a --- /dev/null +++ b/share/doc/gcc/x86-Function-Attributes.html @@ -0,0 +1,1106 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd"> +<html> +<!-- This file documents the use of the GNU compilers. + +Copyright (C) 1988-2023 Free Software Foundation, Inc. + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License, Version 1.3 or +any later version published by the Free Software Foundation; with the +Invariant Sections being "Funding Free Software", the Front-Cover +Texts being (a) (see below), and with the Back-Cover Texts being (b) +(see below). A copy of the license is included in the section entitled +"GNU Free Documentation License". + +(a) The FSF's Front-Cover Text is: + +A GNU Manual + +(b) The FSF's Back-Cover Text is: + +You have freedom to copy and modify this GNU Manual, like GNU + software. Copies published by the Free Software Foundation raise + funds for GNU development. --> +<!-- Created by GNU Texinfo 5.1, http://www.gnu.org/software/texinfo/ --> +<head> +<title>Using the GNU Compiler Collection (GCC): x86 Function Attributes</title> + +<meta name="description" content="Using the GNU Compiler Collection (GCC): x86 Function Attributes"> +<meta name="keywords" content="Using the GNU Compiler Collection (GCC): x86 Function Attributes"> +<meta name="resource-type" content="document"> +<meta name="distribution" content="global"> +<meta name="Generator" content="makeinfo"> +<meta http-equiv="Content-Type" content="text/html; charset=utf-8"> +<link href="index.html#Top" rel="start" title="Top"> +<link href="Indices.html#Indices" rel="index" title="Indices"> +<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents"> +<link href="Function-Attributes.html#Function-Attributes" rel="up" title="Function Attributes"> +<link href="Xstormy16-Function-Attributes.html#Xstormy16-Function-Attributes" rel="next" title="Xstormy16 Function Attributes"> +<link href="Visium-Function-Attributes.html#Visium-Function-Attributes" rel="previous" title="Visium Function Attributes"> +<style type="text/css"> +<!-- +a.summary-letter {text-decoration: none} +blockquote.smallquotation {font-size: smaller} +div.display {margin-left: 3.2em} +div.example {margin-left: 3.2em} +div.indentedblock {margin-left: 3.2em} +div.lisp {margin-left: 3.2em} +div.smalldisplay {margin-left: 3.2em} +div.smallexample {margin-left: 3.2em} +div.smallindentedblock {margin-left: 3.2em; font-size: smaller} +div.smalllisp {margin-left: 3.2em} +kbd {font-style:oblique} +pre.display {font-family: inherit} +pre.format {font-family: inherit} +pre.menu-comment {font-family: serif} +pre.menu-preformatted {font-family: serif} +pre.smalldisplay {font-family: inherit; font-size: smaller} +pre.smallexample {font-size: smaller} +pre.smallformat {font-family: inherit; font-size: smaller} +pre.smalllisp {font-size: smaller} +span.nocodebreak {white-space:nowrap} +span.nolinebreak {white-space:nowrap} +span.roman {font-family:serif; font-weight:normal} +span.sansserif {font-family:sans-serif; font-weight:normal} +ul.no-bullet {list-style: none} +--> +</style> + + +</head> + +<body lang="en_US" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000"> +<a name="x86-Function-Attributes"></a> +<div class="header"> +<p> +Next: <a href="Xstormy16-Function-Attributes.html#Xstormy16-Function-Attributes" accesskey="n" rel="next">Xstormy16 Function Attributes</a>, Previous: <a href="Visium-Function-Attributes.html#Visium-Function-Attributes" accesskey="p" rel="previous">Visium Function Attributes</a>, Up: <a href="Function-Attributes.html#Function-Attributes" accesskey="u" rel="up">Function Attributes</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Indices.html#Indices" title="Index" rel="index">Index</a>]</p> +</div> +<hr> +<a name="x86-Function-Attributes-1"></a> +<h4 class="subsection">6.33.33 x86 Function Attributes</h4> + +<p>These function attributes are supported by the x86 back end: +</p> +<dl compact="compact"> +<dd><a name="index-cdecl-function-attribute_002c-x86_002d32"></a> +<a name="index-functions-that-pop-the-argument-stack-on-x86_002d32"></a> +<a name="index-mrtd-2"></a> +</dd> +<dt><code>cdecl</code></dt> +<dd><p>On the x86-32 targets, the <code>cdecl</code> attribute causes the compiler to +assume that the calling function pops off the stack space used to +pass arguments. This is +useful to override the effects of the <samp>-mrtd</samp> switch. +</p> +<a name="index-fastcall-function-attribute_002c-x86_002d32"></a> +<a name="index-functions-that-pop-the-argument-stack-on-x86_002d32-1"></a> +</dd> +<dt><code>fastcall</code></dt> +<dd><p>On x86-32 targets, the <code>fastcall</code> attribute causes the compiler to +pass the first argument (if of integral type) in the register ECX and +the second argument (if of integral type) in the register EDX. Subsequent +and other typed arguments are passed on the stack. The called function +pops the arguments off the stack. If the number of arguments is variable all +arguments are pushed on the stack. +</p> +<a name="index-thiscall-function-attribute_002c-x86_002d32"></a> +<a name="index-functions-that-pop-the-argument-stack-on-x86_002d32-2"></a> +</dd> +<dt><code>thiscall</code></dt> +<dd><p>On x86-32 targets, the <code>thiscall</code> attribute causes the compiler to +pass the first argument (if of integral type) in the register ECX. +Subsequent and other typed arguments are passed on the stack. The called +function pops the arguments off the stack. +If the number of arguments is variable all arguments are pushed on the +stack. +The <code>thiscall</code> attribute is intended for C++ non-static member functions. +As a GCC extension, this calling convention can be used for C functions +and for static member methods. +</p> +<a name="index-ms_005fabi-function-attribute_002c-x86"></a> +<a name="index-sysv_005fabi-function-attribute_002c-x86"></a> +</dd> +<dt><code>ms_abi</code></dt> +<dt><code>sysv_abi</code></dt> +<dd> +<p>On 32-bit and 64-bit x86 targets, you can use an ABI attribute +to indicate which calling convention should be used for a function. The +<code>ms_abi</code> attribute tells the compiler to use the Microsoft ABI, +while the <code>sysv_abi</code> attribute tells the compiler to use the System V +ELF ABI, which is used on GNU/Linux and other systems. The default is to use +the Microsoft ABI when targeting Windows. On all other systems, the default +is the System V ELF ABI. +</p> +<p>Note, the <code>ms_abi</code> attribute for Microsoft Windows 64-bit targets currently +requires the <samp>-maccumulate-outgoing-args</samp> option. +</p> +<a name="index-callee_005fpop_005faggregate_005freturn-function-attribute_002c-x86"></a> +</dd> +<dt><code>callee_pop_aggregate_return (<var>number</var>)</code></dt> +<dd> +<p>On x86-32 targets, you can use this attribute to control how +aggregates are returned in memory. If the caller is responsible for +popping the hidden pointer together with the rest of the arguments, specify +<var>number</var> equal to zero. If callee is responsible for popping the +hidden pointer, specify <var>number</var> equal to one. +</p> +<p>The default x86-32 ABI assumes that the callee pops the +stack for hidden pointer. However, on x86-32 Microsoft Windows targets, +the compiler assumes that the +caller pops the stack for hidden pointer. +</p> +<a name="index-ms_005fhook_005fprologue-function-attribute_002c-x86"></a> +</dd> +<dt><code>ms_hook_prologue</code></dt> +<dd> +<p>On 32-bit and 64-bit x86 targets, you can use +this function attribute to make GCC generate the “hot-patching” function +prologue used in Win32 API functions in Microsoft Windows XP Service Pack 2 +and newer. +</p> +<a name="index-naked-function-attribute_002c-x86"></a> +</dd> +<dt><code>naked</code></dt> +<dd><p>This attribute allows the compiler to construct the +requisite function declaration, while allowing the body of the +function to be assembly code. The specified function will not have +prologue/epilogue sequences generated by the compiler. Only basic +<code>asm</code> statements can safely be included in naked functions +(see <a href="Basic-Asm.html#Basic-Asm">Basic Asm</a>). While using extended <code>asm</code> or a mixture of +basic <code>asm</code> and C code may appear to work, they cannot be +depended upon to work reliably and are not supported. +</p> +<a name="index-regparm-function-attribute_002c-x86"></a> +<a name="index-functions-that-are-passed-arguments-in-registers-on-x86_002d32"></a> +</dd> +<dt><code>regparm (<var>number</var>)</code></dt> +<dd><p>On x86-32 targets, the <code>regparm</code> attribute causes the compiler to +pass arguments number one to <var>number</var> if they are of integral type +in registers EAX, EDX, and ECX instead of on the stack. Functions that +take a variable number of arguments continue to be passed all of their +arguments on the stack. +</p> +<p>Beware that on some ELF systems this attribute is unsuitable for +global functions in shared libraries with lazy binding (which is the +default). Lazy binding sends the first call via resolving code in +the loader, which might assume EAX, EDX and ECX can be clobbered, as +per the standard calling conventions. Solaris 8 is affected by this. +Systems with the GNU C Library version 2.1 or higher +and FreeBSD are believed to be +safe since the loaders there save EAX, EDX and ECX. (Lazy binding can be +disabled with the linker or the loader if desired, to avoid the +problem.) +</p> +<a name="index-sseregparm-function-attribute_002c-x86"></a> +</dd> +<dt><code>sseregparm</code></dt> +<dd><p>On x86-32 targets with SSE support, the <code>sseregparm</code> attribute +causes the compiler to pass up to 3 floating-point arguments in +SSE registers instead of on the stack. Functions that take a +variable number of arguments continue to pass all of their +floating-point arguments on the stack. +</p> +<a name="index-force_005falign_005farg_005fpointer-function-attribute_002c-x86"></a> +</dd> +<dt><code>force_align_arg_pointer</code></dt> +<dd><p>On x86 targets, the <code>force_align_arg_pointer</code> attribute may be +applied to individual function definitions, generating an alternate +prologue and epilogue that realigns the run-time stack if necessary. +This supports mixing legacy codes that run with a 4-byte aligned stack +with modern codes that keep a 16-byte stack for SSE compatibility. +</p> +<a name="index-stdcall-function-attribute_002c-x86_002d32"></a> +<a name="index-functions-that-pop-the-argument-stack-on-x86_002d32-3"></a> +</dd> +<dt><code>stdcall</code></dt> +<dd><p>On x86-32 targets, the <code>stdcall</code> attribute causes the compiler to +assume that the called function pops off the stack space used to +pass arguments, unless it takes a variable number of arguments. +</p> +<a name="index-no_005fcaller_005fsaved_005fregisters-function-attribute_002c-x86"></a> +</dd> +<dt><code>no_caller_saved_registers</code></dt> +<dd><p>Use this attribute to indicate that the specified function has no +caller-saved registers. That is, all registers are callee-saved. For +example, this attribute can be used for a function called from an +interrupt handler. The compiler generates proper function entry and +exit sequences to save and restore any modified registers, except for +the EFLAGS register. Since GCC doesn’t preserve SSE, MMX nor x87 +states, the GCC option <samp>-mgeneral-regs-only</samp> should be used to +compile functions with <code>no_caller_saved_registers</code> attribute. +</p> +<a name="index-interrupt-function-attribute_002c-x86"></a> +</dd> +<dt><code>interrupt</code></dt> +<dd><p>Use this attribute to indicate that the specified function is an +interrupt handler or an exception handler (depending on parameters passed +to the function, explained further). The compiler generates function +entry and exit sequences suitable for use in an interrupt handler when +this attribute is present. The <code>IRET</code> instruction, instead of the +<code>RET</code> instruction, is used to return from interrupt handlers. All +registers, except for the EFLAGS register which is restored by the +<code>IRET</code> instruction, are preserved by the compiler. Since GCC +doesn’t preserve SSE, MMX nor x87 states, the GCC option +<samp>-mgeneral-regs-only</samp> should be used to compile interrupt and +exception handlers. +</p> +<p>Any interruptible-without-stack-switch code must be compiled with +<samp>-mno-red-zone</samp> since interrupt handlers can and will, because +of the hardware design, touch the red zone. +</p> +<p>An interrupt handler must be declared with a mandatory pointer +argument: +</p> +<div class="smallexample"> +<pre class="smallexample">struct interrupt_frame; + +__attribute__ ((interrupt)) +void +f (struct interrupt_frame *frame) +{ +} +</pre></div> + +<p>and you must define <code>struct interrupt_frame</code> as described in the +processor’s manual. +</p> +<p>Exception handlers differ from interrupt handlers because the system +pushes an error code on the stack. An exception handler declaration is +similar to that for an interrupt handler, but with a different mandatory +function signature. The compiler arranges to pop the error code off the +stack before the <code>IRET</code> instruction. +</p> +<div class="smallexample"> +<pre class="smallexample">#ifdef __x86_64__ +typedef unsigned long long int uword_t; +#else +typedef unsigned int uword_t; +#endif + +struct interrupt_frame; + +__attribute__ ((interrupt)) +void +f (struct interrupt_frame *frame, uword_t error_code) +{ + ... +} +</pre></div> + +<p>Exception handlers should only be used for exceptions that push an error +code; you should use an interrupt handler in other cases. The system +will crash if the wrong kind of handler is used. +</p> +<a name="index-target-function-attribute-5"></a> +</dd> +<dt><code>target (<var>options</var>)</code></dt> +<dd><p>As discussed in <a href="Common-Function-Attributes.html#Common-Function-Attributes">Common Function Attributes</a>, this attribute +allows specification of target-specific compilation options. +</p> +<p>On the x86, the following options are allowed: +</p><dl compact="compact"> +<dd><a name="index-target_0028_00223dnow_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>3dnow</samp>’</dt> +<dt>‘<samp>no-3dnow</samp>’</dt> +<dd><p>Enable/disable the generation of the 3DNow! instructions. +</p> +<a name="index-target_0028_00223dnowa_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>3dnowa</samp>’</dt> +<dt>‘<samp>no-3dnowa</samp>’</dt> +<dd><p>Enable/disable the generation of the enhanced 3DNow! instructions. +</p> +<a name="index-target_0028_0022abm_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>abm</samp>’</dt> +<dt>‘<samp>no-abm</samp>’</dt> +<dd><p>Enable/disable the generation of the advanced bit instructions. +</p> +<a name="index-target_0028_0022adx_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>adx</samp>’</dt> +<dt>‘<samp>no-adx</samp>’</dt> +<dd><p>Enable/disable the generation of the ADX instructions. +</p> +<a name="index-target_0028_0022aes_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>aes</samp>’</dt> +<dt>‘<samp>no-aes</samp>’</dt> +<dd><p>Enable/disable the generation of the AES instructions. +</p> +<a name="index-target_0028_0022avx_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx</samp>’</dt> +<dt>‘<samp>no-avx</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX instructions. +</p> +<a name="index-target_0028_0022avx2_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx2</samp>’</dt> +<dt>‘<samp>no-avx2</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX2 instructions. +</p> +<a name="index-target_0028_0022avx5124fmaps_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx5124fmaps</samp>’</dt> +<dt>‘<samp>no-avx5124fmaps</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX5124FMAPS instructions. +</p> +<a name="index-target_0028_0022avx5124vnniw_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx5124vnniw</samp>’</dt> +<dt>‘<samp>no-avx5124vnniw</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX5124VNNIW instructions. +</p> +<a name="index-target_0028_0022avx512bitalg_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx512bitalg</samp>’</dt> +<dt>‘<samp>no-avx512bitalg</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX512BITALG instructions. +</p> +<a name="index-target_0028_0022avx512bw_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx512bw</samp>’</dt> +<dt>‘<samp>no-avx512bw</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX512BW instructions. +</p> +<a name="index-target_0028_0022avx512cd_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx512cd</samp>’</dt> +<dt>‘<samp>no-avx512cd</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX512CD instructions. +</p> +<a name="index-target_0028_0022avx512dq_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx512dq</samp>’</dt> +<dt>‘<samp>no-avx512dq</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX512DQ instructions. +</p> +<a name="index-target_0028_0022avx512er_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx512er</samp>’</dt> +<dt>‘<samp>no-avx512er</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX512ER instructions. +</p> +<a name="index-target_0028_0022avx512f_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx512f</samp>’</dt> +<dt>‘<samp>no-avx512f</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX512F instructions. +</p> +<a name="index-target_0028_0022avx512ifma_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx512ifma</samp>’</dt> +<dt>‘<samp>no-avx512ifma</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX512IFMA instructions. +</p> +<a name="index-target_0028_0022avx512pf_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx512pf</samp>’</dt> +<dt>‘<samp>no-avx512pf</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX512PF instructions. +</p> +<a name="index-target_0028_0022avx512vbmi_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx512vbmi</samp>’</dt> +<dt>‘<samp>no-avx512vbmi</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX512VBMI instructions. +</p> +<a name="index-target_0028_0022avx512vbmi2_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx512vbmi2</samp>’</dt> +<dt>‘<samp>no-avx512vbmi2</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX512VBMI2 instructions. +</p> +<a name="index-target_0028_0022avx512vl_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx512vl</samp>’</dt> +<dt>‘<samp>no-avx512vl</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX512VL instructions. +</p> +<a name="index-target_0028_0022avx512vnni_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx512vnni</samp>’</dt> +<dt>‘<samp>no-avx512vnni</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX512VNNI instructions. +</p> +<a name="index-target_0028_0022avx512vpopcntdq_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avx512vpopcntdq</samp>’</dt> +<dt>‘<samp>no-avx512vpopcntdq</samp>’</dt> +<dd><p>Enable/disable the generation of the AVX512VPOPCNTDQ instructions. +</p> +<a name="index-target_0028_0022bmi_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>bmi</samp>’</dt> +<dt>‘<samp>no-bmi</samp>’</dt> +<dd><p>Enable/disable the generation of the BMI instructions. +</p> +<a name="index-target_0028_0022bmi2_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>bmi2</samp>’</dt> +<dt>‘<samp>no-bmi2</samp>’</dt> +<dd><p>Enable/disable the generation of the BMI2 instructions. +</p> +<a name="index-target_0028_0022cldemote_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>cldemote</samp>’</dt> +<dt>‘<samp>no-cldemote</samp>’</dt> +<dd><p>Enable/disable the generation of the CLDEMOTE instructions. +</p> +<a name="index-target_0028_0022clflushopt_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>clflushopt</samp>’</dt> +<dt>‘<samp>no-clflushopt</samp>’</dt> +<dd><p>Enable/disable the generation of the CLFLUSHOPT instructions. +</p> +<a name="index-target_0028_0022clwb_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>clwb</samp>’</dt> +<dt>‘<samp>no-clwb</samp>’</dt> +<dd><p>Enable/disable the generation of the CLWB instructions. +</p> +<a name="index-target_0028_0022clzero_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>clzero</samp>’</dt> +<dt>‘<samp>no-clzero</samp>’</dt> +<dd><p>Enable/disable the generation of the CLZERO instructions. +</p> +<a name="index-target_0028_0022crc32_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>crc32</samp>’</dt> +<dt>‘<samp>no-crc32</samp>’</dt> +<dd><p>Enable/disable the generation of the CRC32 instructions. +</p> +<a name="index-target_0028_0022cx16_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>cx16</samp>’</dt> +<dt>‘<samp>no-cx16</samp>’</dt> +<dd><p>Enable/disable the generation of the CMPXCHG16B instructions. +</p> +<a name="index-target_0028_0022default_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>default</samp>’</dt> +<dd><p>See <a href="Function-Multiversioning.html#Function-Multiversioning">Function Multiversioning</a>, where it is used to specify the +default function version. +</p> +<a name="index-target_0028_0022f16c_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>f16c</samp>’</dt> +<dt>‘<samp>no-f16c</samp>’</dt> +<dd><p>Enable/disable the generation of the F16C instructions. +</p> +<a name="index-target_0028_0022fma_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>fma</samp>’</dt> +<dt>‘<samp>no-fma</samp>’</dt> +<dd><p>Enable/disable the generation of the FMA instructions. +</p> +<a name="index-target_0028_0022fma4_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>fma4</samp>’</dt> +<dt>‘<samp>no-fma4</samp>’</dt> +<dd><p>Enable/disable the generation of the FMA4 instructions. +</p> +<a name="index-target_0028_0022fsgsbase_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>fsgsbase</samp>’</dt> +<dt>‘<samp>no-fsgsbase</samp>’</dt> +<dd><p>Enable/disable the generation of the FSGSBASE instructions. +</p> +<a name="index-target_0028_0022fxsr_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>fxsr</samp>’</dt> +<dt>‘<samp>no-fxsr</samp>’</dt> +<dd><p>Enable/disable the generation of the FXSR instructions. +</p> +<a name="index-target_0028_0022gfni_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>gfni</samp>’</dt> +<dt>‘<samp>no-gfni</samp>’</dt> +<dd><p>Enable/disable the generation of the GFNI instructions. +</p> +<a name="index-target_0028_0022hle_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>hle</samp>’</dt> +<dt>‘<samp>no-hle</samp>’</dt> +<dd><p>Enable/disable the generation of the HLE instruction prefixes. +</p> +<a name="index-target_0028_0022lwp_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>lwp</samp>’</dt> +<dt>‘<samp>no-lwp</samp>’</dt> +<dd><p>Enable/disable the generation of the LWP instructions. +</p> +<a name="index-target_0028_0022lzcnt_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>lzcnt</samp>’</dt> +<dt>‘<samp>no-lzcnt</samp>’</dt> +<dd><p>Enable/disable the generation of the LZCNT instructions. +</p> +<a name="index-target_0028_0022mmx_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>mmx</samp>’</dt> +<dt>‘<samp>no-mmx</samp>’</dt> +<dd><p>Enable/disable the generation of the MMX instructions. +</p> +<a name="index-target_0028_0022movbe_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>movbe</samp>’</dt> +<dt>‘<samp>no-movbe</samp>’</dt> +<dd><p>Enable/disable the generation of the MOVBE instructions. +</p> +<a name="index-target_0028_0022movdir64b_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>movdir64b</samp>’</dt> +<dt>‘<samp>no-movdir64b</samp>’</dt> +<dd><p>Enable/disable the generation of the MOVDIR64B instructions. +</p> +<a name="index-target_0028_0022movdiri_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>movdiri</samp>’</dt> +<dt>‘<samp>no-movdiri</samp>’</dt> +<dd><p>Enable/disable the generation of the MOVDIRI instructions. +</p> +<a name="index-target_0028_0022mwait_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>mwait</samp>’</dt> +<dt>‘<samp>no-mwait</samp>’</dt> +<dd><p>Enable/disable the generation of the MWAIT and MONITOR instructions. +</p> +<a name="index-target_0028_0022mwaitx_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>mwaitx</samp>’</dt> +<dt>‘<samp>no-mwaitx</samp>’</dt> +<dd><p>Enable/disable the generation of the MWAITX instructions. +</p> +<a name="index-target_0028_0022pclmul_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>pclmul</samp>’</dt> +<dt>‘<samp>no-pclmul</samp>’</dt> +<dd><p>Enable/disable the generation of the PCLMUL instructions. +</p> +<a name="index-target_0028_0022pconfig_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>pconfig</samp>’</dt> +<dt>‘<samp>no-pconfig</samp>’</dt> +<dd><p>Enable/disable the generation of the PCONFIG instructions. +</p> +<a name="index-target_0028_0022pku_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>pku</samp>’</dt> +<dt>‘<samp>no-pku</samp>’</dt> +<dd><p>Enable/disable the generation of the PKU instructions. +</p> +<a name="index-target_0028_0022popcnt_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>popcnt</samp>’</dt> +<dt>‘<samp>no-popcnt</samp>’</dt> +<dd><p>Enable/disable the generation of the POPCNT instruction. +</p> +<a name="index-target_0028_0022prefetchwt1_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>prefetchwt1</samp>’</dt> +<dt>‘<samp>no-prefetchwt1</samp>’</dt> +<dd><p>Enable/disable the generation of the PREFETCHWT1 instructions. +</p> +<a name="index-target_0028_0022prfchw_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>prfchw</samp>’</dt> +<dt>‘<samp>no-prfchw</samp>’</dt> +<dd><p>Enable/disable the generation of the PREFETCHW instruction. +</p> +<a name="index-target_0028_0022ptwrite_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>ptwrite</samp>’</dt> +<dt>‘<samp>no-ptwrite</samp>’</dt> +<dd><p>Enable/disable the generation of the PTWRITE instructions. +</p> +<a name="index-target_0028_0022rdpid_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>rdpid</samp>’</dt> +<dt>‘<samp>no-rdpid</samp>’</dt> +<dd><p>Enable/disable the generation of the RDPID instructions. +</p> +<a name="index-target_0028_0022rdrnd_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>rdrnd</samp>’</dt> +<dt>‘<samp>no-rdrnd</samp>’</dt> +<dd><p>Enable/disable the generation of the RDRND instructions. +</p> +<a name="index-target_0028_0022rdseed_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>rdseed</samp>’</dt> +<dt>‘<samp>no-rdseed</samp>’</dt> +<dd><p>Enable/disable the generation of the RDSEED instructions. +</p> +<a name="index-target_0028_0022rtm_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>rtm</samp>’</dt> +<dt>‘<samp>no-rtm</samp>’</dt> +<dd><p>Enable/disable the generation of the RTM instructions. +</p> +<a name="index-target_0028_0022sahf_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>sahf</samp>’</dt> +<dt>‘<samp>no-sahf</samp>’</dt> +<dd><p>Enable/disable the generation of the SAHF instructions. +</p> +<a name="index-target_0028_0022sgx_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>sgx</samp>’</dt> +<dt>‘<samp>no-sgx</samp>’</dt> +<dd><p>Enable/disable the generation of the SGX instructions. +</p> +<a name="index-target_0028_0022sha_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>sha</samp>’</dt> +<dt>‘<samp>no-sha</samp>’</dt> +<dd><p>Enable/disable the generation of the SHA instructions. +</p> +<a name="index-target_0028_0022shstk_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>shstk</samp>’</dt> +<dt>‘<samp>no-shstk</samp>’</dt> +<dd><p>Enable/disable the shadow stack built-in functions from CET. +</p> +<a name="index-target_0028_0022sse_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>sse</samp>’</dt> +<dt>‘<samp>no-sse</samp>’</dt> +<dd><p>Enable/disable the generation of the SSE instructions. +</p> +<a name="index-target_0028_0022sse2_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>sse2</samp>’</dt> +<dt>‘<samp>no-sse2</samp>’</dt> +<dd><p>Enable/disable the generation of the SSE2 instructions. +</p> +<a name="index-target_0028_0022sse3_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>sse3</samp>’</dt> +<dt>‘<samp>no-sse3</samp>’</dt> +<dd><p>Enable/disable the generation of the SSE3 instructions. +</p> +<a name="index-target_0028_0022sse4_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>sse4</samp>’</dt> +<dt>‘<samp>no-sse4</samp>’</dt> +<dd><p>Enable/disable the generation of the SSE4 instructions (both SSE4.1 +and SSE4.2). +</p> +<a name="index-target_0028_0022sse4_002e1_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>sse4.1</samp>’</dt> +<dt>‘<samp>no-sse4.1</samp>’</dt> +<dd><p>Enable/disable the generation of the SSE4.1 instructions. +</p> +<a name="index-target_0028_0022sse4_002e2_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>sse4.2</samp>’</dt> +<dt>‘<samp>no-sse4.2</samp>’</dt> +<dd><p>Enable/disable the generation of the SSE4.2 instructions. +</p> +<a name="index-target_0028_0022sse4a_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>sse4a</samp>’</dt> +<dt>‘<samp>no-sse4a</samp>’</dt> +<dd><p>Enable/disable the generation of the SSE4A instructions. +</p> +<a name="index-target_0028_0022ssse3_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>ssse3</samp>’</dt> +<dt>‘<samp>no-ssse3</samp>’</dt> +<dd><p>Enable/disable the generation of the SSSE3 instructions. +</p> +<a name="index-target_0028_0022tbm_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>tbm</samp>’</dt> +<dt>‘<samp>no-tbm</samp>’</dt> +<dd><p>Enable/disable the generation of the TBM instructions. +</p> +<a name="index-target_0028_0022vaes_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>vaes</samp>’</dt> +<dt>‘<samp>no-vaes</samp>’</dt> +<dd><p>Enable/disable the generation of the VAES instructions. +</p> +<a name="index-target_0028_0022vpclmulqdq_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>vpclmulqdq</samp>’</dt> +<dt>‘<samp>no-vpclmulqdq</samp>’</dt> +<dd><p>Enable/disable the generation of the VPCLMULQDQ instructions. +</p> +<a name="index-target_0028_0022waitpkg_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>waitpkg</samp>’</dt> +<dt>‘<samp>no-waitpkg</samp>’</dt> +<dd><p>Enable/disable the generation of the WAITPKG instructions. +</p> +<a name="index-target_0028_0022wbnoinvd_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>wbnoinvd</samp>’</dt> +<dt>‘<samp>no-wbnoinvd</samp>’</dt> +<dd><p>Enable/disable the generation of the WBNOINVD instructions. +</p> +<a name="index-target_0028_0022xop_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>xop</samp>’</dt> +<dt>‘<samp>no-xop</samp>’</dt> +<dd><p>Enable/disable the generation of the XOP instructions. +</p> +<a name="index-target_0028_0022xsave_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>xsave</samp>’</dt> +<dt>‘<samp>no-xsave</samp>’</dt> +<dd><p>Enable/disable the generation of the XSAVE instructions. +</p> +<a name="index-target_0028_0022xsavec_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>xsavec</samp>’</dt> +<dt>‘<samp>no-xsavec</samp>’</dt> +<dd><p>Enable/disable the generation of the XSAVEC instructions. +</p> +<a name="index-target_0028_0022xsaveopt_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>xsaveopt</samp>’</dt> +<dt>‘<samp>no-xsaveopt</samp>’</dt> +<dd><p>Enable/disable the generation of the XSAVEOPT instructions. +</p> +<a name="index-target_0028_0022xsaves_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>xsaves</samp>’</dt> +<dt>‘<samp>no-xsaves</samp>’</dt> +<dd><p>Enable/disable the generation of the XSAVES instructions. +</p> +<a name="index-target_0028_0022amx_002dtile_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>amx-tile</samp>’</dt> +<dt>‘<samp>no-amx-tile</samp>’</dt> +<dd><p>Enable/disable the generation of the AMX-TILE instructions. +</p> +<a name="index-target_0028_0022amx_002dint8_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>amx-int8</samp>’</dt> +<dt>‘<samp>no-amx-int8</samp>’</dt> +<dd><p>Enable/disable the generation of the AMX-INT8 instructions. +</p> +<a name="index-target_0028_0022amx_002dbf16_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>amx-bf16</samp>’</dt> +<dt>‘<samp>no-amx-bf16</samp>’</dt> +<dd><p>Enable/disable the generation of the AMX-BF16 instructions. +</p> +<a name="index-target_0028_0022uintr_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>uintr</samp>’</dt> +<dt>‘<samp>no-uintr</samp>’</dt> +<dd><p>Enable/disable the generation of the UINTR instructions. +</p> +<a name="index-target_0028_0022hreset_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>hreset</samp>’</dt> +<dt>‘<samp>no-hreset</samp>’</dt> +<dd><p>Enable/disable the generation of the HRESET instruction. +</p> +<a name="index-target_0028_0022kl_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>kl</samp>’</dt> +<dt>‘<samp>no-kl</samp>’</dt> +<dd><p>Enable/disable the generation of the KEYLOCKER instructions. +</p> +<a name="index-target_0028_0022widekl_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>widekl</samp>’</dt> +<dt>‘<samp>no-widekl</samp>’</dt> +<dd><p>Enable/disable the generation of the WIDEKL instructions. +</p> +<a name="index-target_0028_0022avxvnni_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avxvnni</samp>’</dt> +<dt>‘<samp>no-avxvnni</samp>’</dt> +<dd><p>Enable/disable the generation of the AVXVNNI instructions. +</p> +<a name="index-target_0028_0022avxifma_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avxifma</samp>’</dt> +<dt>‘<samp>no-avxifma</samp>’</dt> +<dd><p>Enable/disable the generation of the AVXIFMA instructions. +</p> +<a name="index-target_0028_0022avxvnniint8_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avxvnniint8</samp>’</dt> +<dt>‘<samp>no-avxvnniint8</samp>’</dt> +<dd><p>Enable/disable the generation of the AVXVNNIINT8 instructions. +</p> +<a name="index-target_0028_0022avxneconvert_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>avxneconvert</samp>’</dt> +<dt>‘<samp>no-avxneconvert</samp>’</dt> +<dd><p>Enable/disable the generation of the AVXNECONVERT instructions. +</p> +<a name="index-target_0028_0022cmpccxadd_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>cmpccxadd</samp>’</dt> +<dt>‘<samp>no-cmpccxadd</samp>’</dt> +<dd><p>Enable/disable the generation of the CMPccXADD instructions. +</p> +<a name="index-target_0028_0022amx_002dfp16_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>amx-fp16</samp>’</dt> +<dt>‘<samp>no-amx-fp16</samp>’</dt> +<dd><p>Enable/disable the generation of the AMX-FP16 instructions. +</p> +<a name="index-target_0028_0022prefetchi_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>prefetchi</samp>’</dt> +<dt>‘<samp>no-prefetchi</samp>’</dt> +<dd><p>Enable/disable the generation of the PREFETCHI instructions. +</p> +<a name="index-target_0028_0022raoint_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>raoint</samp>’</dt> +<dt>‘<samp>no-raoint</samp>’</dt> +<dd><p>Enable/disable the generation of the RAOINT instructions. +</p> +<a name="index-target_0028_0022amx_002dcomplex_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>amx-complex</samp>’</dt> +<dt>‘<samp>no-amx-complex</samp>’</dt> +<dd><p>Enable/disable the generation of the AMX-COMPLEX instructions. +</p> +<a name="index-target_0028_0022cld_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>cld</samp>’</dt> +<dt>‘<samp>no-cld</samp>’</dt> +<dd><p>Enable/disable the generation of the CLD before string moves. +</p> +<a name="index-target_0028_0022fancy_002dmath_002d387_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>fancy-math-387</samp>’</dt> +<dt>‘<samp>no-fancy-math-387</samp>’</dt> +<dd><p>Enable/disable the generation of the <code>sin</code>, <code>cos</code>, and +<code>sqrt</code> instructions on the 387 floating-point unit. +</p> +<a name="index-target_0028_0022ieee_002dfp_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>ieee-fp</samp>’</dt> +<dt>‘<samp>no-ieee-fp</samp>’</dt> +<dd><p>Enable/disable the generation of floating point that depends on IEEE arithmetic. +</p> +<a name="index-target_0028_0022inline_002dall_002dstringops_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>inline-all-stringops</samp>’</dt> +<dt>‘<samp>no-inline-all-stringops</samp>’</dt> +<dd><p>Enable/disable inlining of string operations. +</p> +<a name="index-target_0028_0022inline_002dstringops_002ddynamically_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>inline-stringops-dynamically</samp>’</dt> +<dt>‘<samp>no-inline-stringops-dynamically</samp>’</dt> +<dd><p>Enable/disable the generation of the inline code to do small string +operations and calling the library routines for large operations. +</p> +<a name="index-target_0028_0022align_002dstringops_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>align-stringops</samp>’</dt> +<dt>‘<samp>no-align-stringops</samp>’</dt> +<dd><p>Do/do not align destination of inlined string operations. +</p> +<a name="index-target_0028_0022recip_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>recip</samp>’</dt> +<dt>‘<samp>no-recip</samp>’</dt> +<dd><p>Enable/disable the generation of RCPSS, RCPPS, RSQRTSS and RSQRTPS +instructions followed an additional Newton-Raphson step instead of +doing a floating-point division. +</p> +<a name="index-target_0028_0022general_002dregs_002donly_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>general-regs-only</samp>’</dt> +<dd><p>Generate code which uses only the general registers. +</p> +<a name="index-target_0028_0022arch_003dARCH_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>arch=<var>ARCH</var></samp>’</dt> +<dd><p>Specify the architecture to generate code for in compiling the function. +</p> +<a name="index-target_0028_0022tune_003dTUNE_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>tune=<var>TUNE</var></samp>’</dt> +<dd><p>Specify the architecture to tune for in compiling the function. +</p> +<a name="index-target_0028_0022fpmath_003dFPMATH_0022_0029-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>fpmath=<var>FPMATH</var></samp>’</dt> +<dd><p>Specify which floating-point unit to use. You must specify the +<code>target("fpmath=sse,387")</code> option as +<code>target("fpmath=sse+387")</code> because the comma would separate +different options. +</p> +<a name="index-prefer_002dvector_002dwidth-function-attribute_002c-x86"></a> +</dd> +<dt>‘<samp>prefer-vector-width=<var>OPT</var></samp>’</dt> +<dd><p>On x86 targets, the <code>prefer-vector-width</code> attribute informs the +compiler to use <var>OPT</var>-bit vector width in instructions +instead of the default on the selected platform. +</p> +<p>Valid <var>OPT</var> values are: +</p> +<dl compact="compact"> +<dt>‘<samp>none</samp>’</dt> +<dd><p>No extra limitations applied to GCC other than defined by the selected platform. +</p> +</dd> +<dt>‘<samp>128</samp>’</dt> +<dd><p>Prefer 128-bit vector width for instructions. +</p> +</dd> +<dt>‘<samp>256</samp>’</dt> +<dd><p>Prefer 256-bit vector width for instructions. +</p> +</dd> +<dt>‘<samp>512</samp>’</dt> +<dd><p>Prefer 512-bit vector width for instructions. +</p></dd> +</dl> + +<p>On the x86, the inliner does not inline a +function that has different target options than the caller, unless the +callee has a subset of the target options of the caller. For example +a function declared with <code>target("sse3")</code> can inline a function +with <code>target("sse2")</code>, since <code>-msse3</code> implies <code>-msse2</code>. +</p></dd> +</dl> + +<a name="index-indirect_005fbranch-function-attribute_002c-x86"></a> +</dd> +<dt><code>indirect_branch("<var>choice</var>")</code></dt> +<dd><p>On x86 targets, the <code>indirect_branch</code> attribute causes the compiler +to convert indirect call and jump with <var>choice</var>. ‘<samp>keep</samp>’ +keeps indirect call and jump unmodified. ‘<samp>thunk</samp>’ converts indirect +call and jump to call and return thunk. ‘<samp>thunk-inline</samp>’ converts +indirect call and jump to inlined call and return thunk. +‘<samp>thunk-extern</samp>’ converts indirect call and jump to external call +and return thunk provided in a separate object file. +</p> +<a name="index-function_005freturn-function-attribute_002c-x86"></a> +</dd> +<dt><code>function_return("<var>choice</var>")</code></dt> +<dd><p>On x86 targets, the <code>function_return</code> attribute causes the compiler +to convert function return with <var>choice</var>. ‘<samp>keep</samp>’ keeps function +return unmodified. ‘<samp>thunk</samp>’ converts function return to call and +return thunk. ‘<samp>thunk-inline</samp>’ converts function return to inlined +call and return thunk. ‘<samp>thunk-extern</samp>’ converts function return to +external call and return thunk provided in a separate object file. +</p> +<a name="index-nocf_005fcheck-function-attribute"></a> +</dd> +<dt><code>nocf_check</code></dt> +<dd><p>The <code>nocf_check</code> attribute on a function is used to inform the +compiler that the function’s prologue should not be instrumented when +compiled with the <samp>-fcf-protection=branch</samp> option. The +compiler assumes that the function’s address is a valid target for a +control-flow transfer. +</p> +<p>The <code>nocf_check</code> attribute on a type of pointer to function is +used to inform the compiler that a call through the pointer should +not be instrumented when compiled with the +<samp>-fcf-protection=branch</samp> option. The compiler assumes +that the function’s address from the pointer is a valid target for +a control-flow transfer. A direct function call through a function +name is assumed to be a safe call thus direct calls are not +instrumented by the compiler. +</p> +<p>The <code>nocf_check</code> attribute is applied to an object’s type. +In case of assignment of a function address or a function pointer to +another pointer, the attribute is not carried over from the right-hand +object’s type; the type of left-hand object stays unchanged. The +compiler checks for <code>nocf_check</code> attribute mismatch and reports +a warning in case of mismatch. +</p> +<div class="smallexample"> +<pre class="smallexample">{ +int foo (void) __attribute__(nocf_check); +void (*foo1)(void) __attribute__(nocf_check); +void (*foo2)(void); + +/* foo's address is assumed to be valid. */ +int +foo (void) + + /* This call site is not checked for control-flow + validity. */ + (*foo1)(); + + /* A warning is issued about attribute mismatch. */ + foo1 = foo2; + + /* This call site is still not checked. */ + (*foo1)(); + + /* This call site is checked. */ + (*foo2)(); + + /* A warning is issued about attribute mismatch. */ + foo2 = foo1; + + /* This call site is still checked. */ + (*foo2)(); + + return 0; +} +</pre></div> + +<a name="index-cf_005fcheck-function-attribute_002c-x86"></a> +</dd> +<dt><code>cf_check</code></dt> +<dd> +<p>The <code>cf_check</code> attribute on a function is used to inform the +compiler that ENDBR instruction should be placed at the function +entry when <samp>-fcf-protection=branch</samp> is enabled. +</p> +<a name="index-indirect_005freturn-function-attribute_002c-x86"></a> +</dd> +<dt><code>indirect_return</code></dt> +<dd> +<p>The <code>indirect_return</code> attribute can be applied to a function, +as well as variable or type of function pointer to inform the +compiler that the function may return via indirect branch. +</p> +<a name="index-fentry_005fname-function-attribute_002c-x86"></a> +</dd> +<dt><code>fentry_name("<var>name</var>")</code></dt> +<dd><p>On x86 targets, the <code>fentry_name</code> attribute sets the function to +call on function entry when function instrumentation is enabled +with <samp>-pg -mfentry</samp>. When <var>name</var> is nop then a 5 byte +nop sequence is generated. +</p> +<a name="index-fentry_005fsection-function-attribute_002c-x86"></a> +</dd> +<dt><code>fentry_section("<var>name</var>")</code></dt> +<dd><p>On x86 targets, the <code>fentry_section</code> attribute sets the name +of the section to record function entry instrumentation calls in when +enabled with <samp>-pg -mrecord-mcount</samp> +</p> +<a name="index-nodirect_005fextern_005faccess-function-attribute"></a> +<a name="index-mno_002ddirect_002dextern_002daccess-1"></a> +</dd> +<dt><code>nodirect_extern_access</code></dt> +<dd><p>This attribute, attached to a global variable or function, is the +counterpart to option <samp>-mno-direct-extern-access</samp>. +</p> +</dd> +</dl> + +<hr> +<div class="header"> +<p> +Next: <a href="Xstormy16-Function-Attributes.html#Xstormy16-Function-Attributes" accesskey="n" rel="next">Xstormy16 Function Attributes</a>, Previous: <a href="Visium-Function-Attributes.html#Visium-Function-Attributes" accesskey="p" rel="previous">Visium Function Attributes</a>, Up: <a href="Function-Attributes.html#Function-Attributes" accesskey="u" rel="up">Function Attributes</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Indices.html#Indices" title="Index" rel="index">Index</a>]</p> +</div> + + + +</body> +</html> |