Import stripped Arm GNU Toolchain 13.2.Rel1HEAD umineko

https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads Change-Id: I7303388733328cd98ab9aa3c30236db67f2e9e9c
author: alk3pInjection <webmaster@raspii.tech> 2024-02-04 16:16:35 +0800
committer: alk3pInjection <webmaster@raspii.tech> 2024-02-04 16:16:35 +0800
commit: abdaadbcae30fe0c9a66c7516798279fdfd97750 (patch)
tree: 00a54a6e25601e43876d03c1a4a12a749d4a914c /share/doc/gcc/OpenRISC-Options.html
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+<title>Using the GNU Compiler Collection (GCC): OpenRISC Options</title>
+
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+<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
+<link href="Submodel-Options.html#Submodel-Options" rel="up" title="Submodel Options">
+<link href="PDP_002d11-Options.html#PDP_002d11-Options" rel="next" title="PDP-11 Options">
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+<body lang="en_US" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000">
+<a name="OpenRISC-Options"></a>
+<div class="header">
+<p>
+Next: <a href="PDP_002d11-Options.html#PDP_002d11-Options" accesskey="n" rel="next">PDP-11 Options</a>, Previous: <a href="Nvidia-PTX-Options.html#Nvidia-PTX-Options" accesskey="p" rel="previous">Nvidia PTX Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Indices.html#Indices" title="Index" rel="index">Index</a>]</p>
+</div>
+<hr>
+<a name="OpenRISC-Options-1"></a>
+<h4 class="subsection">3.19.36 OpenRISC Options</h4>
+<a name="index-OpenRISC-Options"></a>
+
+<p>These options are defined for OpenRISC:
+</p>
+<dl compact="compact">
+<dd>
+<a name="index-mboard"></a>
+</dd>
+<dt><code>-mboard=<var>name</var></code></dt>
+<dd><p>Configure a board specific runtime.  This will be passed to the linker for
+newlib board library linking.  The default is <code>or1ksim</code>.
+</p>
+<a name="index-mnewlib"></a>
+</dd>
+<dt><code>-mnewlib</code></dt>
+<dd><p>This option is ignored; it is for compatibility purposes only.  This used to
+select linker and preprocessor options for use with newlib.
+</p>
+<a name="index-msoft_002ddiv"></a>
+<a name="index-mhard_002ddiv"></a>
+</dd>
+<dt><code>-msoft-div</code></dt>
+<dt><code>-mhard-div</code></dt>
+<dd><p>Select software or hardware divide (<code>l.div</code>, <code>l.divu</code>) instructions.
+This default is hardware divide.
+</p>
+<a name="index-msoft_002dmul"></a>
+<a name="index-mhard_002dmul"></a>
+</dd>
+<dt><code>-msoft-mul</code></dt>
+<dt><code>-mhard-mul</code></dt>
+<dd><p>Select software or hardware multiply (<code>l.mul</code>, <code>l.muli</code>) instructions.
+This default is hardware multiply.
+</p>
+<a name="index-msoft_002dfloat-9"></a>
+<a name="index-mhard_002dfloat-5"></a>
+</dd>
+<dt><code>-msoft-float</code></dt>
+<dt><code>-mhard-float</code></dt>
+<dd><p>Select software or hardware for floating point operations.
+The default is software.
+</p>
+<a name="index-mdouble_002dfloat-3"></a>
+</dd>
+<dt><code>-mdouble-float</code></dt>
+<dd><p>When <samp>-mhard-float</samp> is selected, enables generation of double-precision
+floating point instructions.  By default functions from <samp>libgcc</samp> are used
+to perform double-precision floating point operations.
+</p>
+<a name="index-munordered_002dfloat"></a>
+</dd>
+<dt><code>-munordered-float</code></dt>
+<dd><p>When <samp>-mhard-float</samp> is selected, enables generation of unordered
+floating point compare and set flag (<code>lf.sfun*</code>) instructions.  By default
+functions from <samp>libgcc</samp> are used to perform unordered floating point
+compare and set flag operations.
+</p>
+<a name="index-mcmov-1"></a>
+</dd>
+<dt><code>-mcmov</code></dt>
+<dd><p>Enable generation of conditional move (<code>l.cmov</code>) instructions.  By
+default the equivalent will be generated using set and branch.
+</p>
+<a name="index-mror"></a>
+</dd>
+<dt><code>-mror</code></dt>
+<dd><p>Enable generation of rotate right (<code>l.ror</code>) instructions.  By default
+functions from <samp>libgcc</samp> are used to perform rotate right operations.
+</p>
+<a name="index-mrori"></a>
+</dd>
+<dt><code>-mrori</code></dt>
+<dd><p>Enable generation of rotate right with immediate (<code>l.rori</code>) instructions.
+By default functions from <samp>libgcc</samp> are used to perform rotate right with
+immediate operations.
+</p>
+<a name="index-msext"></a>
+</dd>
+<dt><code>-msext</code></dt>
+<dd><p>Enable generation of sign extension (<code>l.ext*</code>) instructions.  By default
+memory loads are used to perform sign extension.
+</p>
+<a name="index-msfimm"></a>
+</dd>
+<dt><code>-msfimm</code></dt>
+<dd><p>Enable generation of compare and set flag with immediate (<code>l.sf*i</code>)
+instructions.  By default extra instructions will be generated to store the
+immediate to a register first.
+</p>
+<a name="index-mshftimm"></a>
+</dd>
+<dt><code>-mshftimm</code></dt>
+<dd><p>Enable generation of shift with immediate (<code>l.srai</code>, <code>l.srli</code>,
+<code>l.slli</code>) instructions.  By default extra instructions will be generated
+to store the immediate to a register first.
+</p>
+<a name="index-mcmodel_003dsmall-1"></a>
+</dd>
+<dt><code>-mcmodel=small</code></dt>
+<dd><p>Generate OpenRISC code for the small model: The GOT is limited to 64k. This is
+the default model.
+</p>
+<a name="index-mcmodel_003dlarge-1"></a>
+</dd>
+<dt><code>-mcmodel=large</code></dt>
+<dd><p>Generate OpenRISC code for the large model: The GOT may grow up to 4G in size.
+</p>
+
+</dd>
+</dl>
+
+<hr>
+<div class="header">
+<p>
+Next: <a href="PDP_002d11-Options.html#PDP_002d11-Options" accesskey="n" rel="next">PDP-11 Options</a>, Previous: <a href="Nvidia-PTX-Options.html#Nvidia-PTX-Options" accesskey="p" rel="previous">Nvidia PTX Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Indices.html#Indices" title="Index" rel="index">Index</a>]</p>
+</div>
+
+
+
+</body>
+</html>
author	alk3pInjection <webmaster@raspii.tech>	2024-02-04 16:16:35 +0800
committer	alk3pInjection <webmaster@raspii.tech>	2024-02-04 16:16:35 +0800
commit	abdaadbcae30fe0c9a66c7516798279fdfd97750 (patch)
tree	00a54a6e25601e43876d03c1a4a12a749d4a914c /share/doc/gcc/OpenRISC-Options.html