Import stripped Arm GNU Toolchain 13.2.Rel1HEAD umineko

https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads Change-Id: I7303388733328cd98ab9aa3c30236db67f2e9e9c
author: alk3pInjection <webmaster@raspii.tech> 2024-02-04 16:16:35 +0800
committer: alk3pInjection <webmaster@raspii.tech> 2024-02-04 16:16:35 +0800
commit: abdaadbcae30fe0c9a66c7516798279fdfd97750 (patch)
tree: 00a54a6e25601e43876d03c1a4a12a749d4a914c /share/doc/gcc/ARC-Built_002din-Functions.html
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+<title>Using the GNU Compiler Collection (GCC): ARC Built-in Functions</title>
+
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+<body lang="en_US" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000">
+<a name="ARC-Built_002din-Functions"></a>
+<div class="header">
+<p>
+Next: <a href="ARC-SIMD-Built_002din-Functions.html#ARC-SIMD-Built_002din-Functions" accesskey="n" rel="next">ARC SIMD Built-in Functions</a>, Previous: <a href="Altera-Nios-II-Built_002din-Functions.html#Altera-Nios-II-Built_002din-Functions" accesskey="p" rel="previous">Altera Nios II Built-in Functions</a>, Up: <a href="Target-Builtins.html#Target-Builtins" accesskey="u" rel="up">Target Builtins</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Indices.html#Indices" title="Index" rel="index">Index</a>]</p>
+</div>
+<hr>
+<a name="ARC-Built_002din-Functions-1"></a>
+<h4 class="subsection">6.60.4 ARC Built-in Functions</h4>
+
+<p>The following built-in functions are provided for ARC targets.  The
+built-ins generate the corresponding assembly instructions.  In the
+examples given below, the generated code often requires an operand or
+result to be in a register.  Where necessary further code will be
+generated to ensure this is true, but for brevity this is not
+described in each case.
+</p>
+<p><em>Note:</em> Using a built-in to generate an instruction not supported
+by a target may cause problems. At present the compiler is not
+guaranteed to detect such misuse, and as a result an internal compiler
+error may be generated.
+</p>
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005faligned"></a>Built-in Function: <em>int</em> <strong>__builtin_arc_aligned</strong> <em>(void *<var>val</var>, int <var>alignval</var>)</em></dt>
+<dd><p>Return 1 if <var>val</var> is known to have the byte alignment given
+by <var>alignval</var>, otherwise return 0.
+Note that this is different from
+</p><div class="smallexample">
+<pre class="smallexample">__alignof__(*(char *)<var>val</var>) &gt;= alignval
+</pre></div>
+<p>because __alignof__ sees only the type of the dereference, whereas
+__builtin_arc_align uses alignment information from the pointer
+as well as from the pointed-to type.
+The information available will depend on optimization level.
+</p></dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fbrk"></a>Built-in Function: <em>void</em> <strong>__builtin_arc_brk</strong> <em>(void)</em></dt>
+<dd><p>Generates
+</p><div class="example">
+<pre class="example">brk
+</pre></div>
+</dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fcore_005fread"></a>Built-in Function: <em>unsigned int</em> <strong>__builtin_arc_core_read</strong> <em>(unsigned int <var>regno</var>)</em></dt>
+<dd><p>The operand is the number of a register to be read.  Generates:
+</p><div class="example">
+<pre class="example">mov  <var>dest</var>, r<var>regno</var>
+</pre></div>
+<p>where the value in <var>dest</var> will be the result returned from the
+built-in.
+</p></dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fcore_005fwrite"></a>Built-in Function: <em>void</em> <strong>__builtin_arc_core_write</strong> <em>(unsigned int <var>regno</var>, unsigned int <var>val</var>)</em></dt>
+<dd><p>The first operand is the number of a register to be written, the
+second operand is a compile time constant to write into that
+register.  Generates:
+</p><div class="example">
+<pre class="example">mov  r<var>regno</var>, <var>val</var>
+</pre></div>
+</dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fdivaw"></a>Built-in Function: <em>int</em> <strong>__builtin_arc_divaw</strong> <em>(int <var>a</var>, int <var>b</var>)</em></dt>
+<dd><p>Only available if either <samp>-mcpu=ARC700</samp> or <samp>-meA</samp> is set.
+Generates:
+</p><div class="example">
+<pre class="example">divaw  <var>dest</var>, <var>a</var>, <var>b</var>
+</pre></div>
+<p>where the value in <var>dest</var> will be the result returned from the
+built-in.
+</p></dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fflag"></a>Built-in Function: <em>void</em> <strong>__builtin_arc_flag</strong> <em>(unsigned int <var>a</var>)</em></dt>
+<dd><p>Generates
+</p><div class="example">
+<pre class="example">flag  <var>a</var>
+</pre></div>
+</dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005flr"></a>Built-in Function: <em>unsigned int</em> <strong>__builtin_arc_lr</strong> <em>(unsigned int <var>auxr</var>)</em></dt>
+<dd><p>The operand, <var>auxv</var>, is the address of an auxiliary register and
+must be a compile time constant.  Generates:
+</p><div class="example">
+<pre class="example">lr  <var>dest</var>, [<var>auxr</var>]
+</pre></div>
+<p>Where the value in <var>dest</var> will be the result returned from the
+built-in.
+</p></dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fmul64"></a>Built-in Function: <em>void</em> <strong>__builtin_arc_mul64</strong> <em>(int <var>a</var>, int <var>b</var>)</em></dt>
+<dd><p>Only available with <samp>-mmul64</samp>.  Generates:
+</p><div class="example">
+<pre class="example">mul64  <var>a</var>, <var>b</var>
+</pre></div>
+</dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fmulu64"></a>Built-in Function: <em>void</em> <strong>__builtin_arc_mulu64</strong> <em>(unsigned int <var>a</var>, unsigned int <var>b</var>)</em></dt>
+<dd><p>Only available with <samp>-mmul64</samp>.  Generates:
+</p><div class="example">
+<pre class="example">mulu64  <var>a</var>, <var>b</var>
+</pre></div>
+</dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fnop"></a>Built-in Function: <em>void</em> <strong>__builtin_arc_nop</strong> <em>(void)</em></dt>
+<dd><p>Generates:
+</p><div class="example">
+<pre class="example">nop
+</pre></div>
+</dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fnorm"></a>Built-in Function: <em>int</em> <strong>__builtin_arc_norm</strong> <em>(int <var>src</var>)</em></dt>
+<dd><p>Only valid if the &lsquo;<samp>norm</samp>&rsquo; instruction is available through the
+<samp>-mnorm</samp> option or by default with <samp>-mcpu=ARC700</samp>.
+Generates:
+</p><div class="example">
+<pre class="example">norm  <var>dest</var>, <var>src</var>
+</pre></div>
+<p>Where the value in <var>dest</var> will be the result returned from the
+built-in.
+</p></dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fnormw"></a>Built-in Function: <em>short int</em> <strong>__builtin_arc_normw</strong> <em>(short int <var>src</var>)</em></dt>
+<dd><p>Only valid if the &lsquo;<samp>normw</samp>&rsquo; instruction is available through the
+<samp>-mnorm</samp> option or by default with <samp>-mcpu=ARC700</samp>.
+Generates:
+</p><div class="example">
+<pre class="example">normw  <var>dest</var>, <var>src</var>
+</pre></div>
+<p>Where the value in <var>dest</var> will be the result returned from the
+built-in.
+</p></dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005frtie"></a>Built-in Function: <em>void</em> <strong>__builtin_arc_rtie</strong> <em>(void)</em></dt>
+<dd><p>Generates:
+</p><div class="example">
+<pre class="example">rtie
+</pre></div>
+</dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fsleep"></a>Built-in Function: <em>void</em> <strong>__builtin_arc_sleep</strong> <em>(int <var>a</var></em></dt>
+<dd><p>Generates:
+</p><div class="example">
+<pre class="example">sleep  <var>a</var>
+</pre></div>
+</dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fsr"></a>Built-in Function: <em>void</em> <strong>__builtin_arc_sr</strong> <em>(unsigned int <var>val</var>, unsigned int <var>auxr</var>)</em></dt>
+<dd><p>The first argument, <var>val</var>, is a compile time constant to be
+written to the register, the second argument, <var>auxr</var>, is the
+address of an auxiliary register.  Generates:
+</p><div class="example">
+<pre class="example">sr  <var>val</var>, [<var>auxr</var>]
+</pre></div>
+</dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fswap"></a>Built-in Function: <em>int</em> <strong>__builtin_arc_swap</strong> <em>(int <var>src</var>)</em></dt>
+<dd><p>Only valid with <samp>-mswap</samp>.  Generates:
+</p><div class="example">
+<pre class="example">swap  <var>dest</var>, <var>src</var>
+</pre></div>
+<p>Where the value in <var>dest</var> will be the result returned from the
+built-in.
+</p></dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fswi"></a>Built-in Function: <em>void</em> <strong>__builtin_arc_swi</strong> <em>(void)</em></dt>
+<dd><p>Generates:
+</p><div class="example">
+<pre class="example">swi
+</pre></div>
+</dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005fsync"></a>Built-in Function: <em>void</em> <strong>__builtin_arc_sync</strong> <em>(void)</em></dt>
+<dd><p>Only available with <samp>-mcpu=ARC700</samp>.  Generates:
+</p><div class="example">
+<pre class="example">sync
+</pre></div>
+</dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005ftrap_005fs"></a>Built-in Function: <em>void</em> <strong>__builtin_arc_trap_s</strong> <em>(unsigned int <var>c</var>)</em></dt>
+<dd><p>Only available with <samp>-mcpu=ARC700</samp>.  Generates:
+</p><div class="example">
+<pre class="example">trap_s  <var>c</var>
+</pre></div>
+</dd></dl>
+
+<dl>
+<dt><a name="index-_005f_005fbuiltin_005farc_005funimp_005fs"></a>Built-in Function: <em>void</em> <strong>__builtin_arc_unimp_s</strong> <em>(void)</em></dt>
+<dd><p>Only available with <samp>-mcpu=ARC700</samp>.  Generates:
+</p><div class="example">
+<pre class="example">unimp_s
+</pre></div>
+</dd></dl>
+
+<p>The instructions generated by the following builtins are not
+considered as candidates for scheduling.  They are not moved around by
+the compiler during scheduling, and thus can be expected to appear
+where they are put in the C code:
+</p><div class="example">
+<pre class="example">__builtin_arc_brk()
+__builtin_arc_core_read()
+__builtin_arc_core_write()
+__builtin_arc_flag()
+__builtin_arc_lr()
+__builtin_arc_sleep()
+__builtin_arc_sr()
+__builtin_arc_swi()
+</pre></div>
+
+<hr>
+<div class="header">
+<p>
+Next: <a href="ARC-SIMD-Built_002din-Functions.html#ARC-SIMD-Built_002din-Functions" accesskey="n" rel="next">ARC SIMD Built-in Functions</a>, Previous: <a href="Altera-Nios-II-Built_002din-Functions.html#Altera-Nios-II-Built_002din-Functions" accesskey="p" rel="previous">Altera Nios II Built-in Functions</a>, Up: <a href="Target-Builtins.html#Target-Builtins" accesskey="u" rel="up">Target Builtins</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Indices.html#Indices" title="Index" rel="index">Index</a>]</p>
+</div>
+
+
+
+</body>
+</html>
author	alk3pInjection <webmaster@raspii.tech>	2024-02-04 16:16:35 +0800
committer	alk3pInjection <webmaster@raspii.tech>	2024-02-04 16:16:35 +0800
commit	abdaadbcae30fe0c9a66c7516798279fdfd97750 (patch)
tree	00a54a6e25601e43876d03c1a4a12a749d4a914c /share/doc/gcc/ARC-Built_002din-Functions.html