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author | Matheus Castanho <msc@linux.ibm.com> | 2020-05-25 18:10:29 -0300 |
---|---|---|
committer | Hans Kristian Rosbach <hk-github@circlestorm.org> | 2020-06-08 14:47:17 +0200 |
commit | b81f4ee96dcbdf1db34b00727b6f1829a2ba1edb (patch) | |
tree | 19f67906f91f84ff477da4d416500ad92deea238 /functable.c | |
parent | 0ebe2fafdda0470d0a11aa0e5b84f8b6c500d584 (diff) |
Preparation for POWER optimizations
Add the scaffolding for future optimizations for POWER processors. Now
the build is capable of correctly detecting multiple processor
sub-architectures (ppc, ppc64 and ppc64le) and also if features
needed for the optimizations are available during build and runtime.
With these changes, adding a new optimized function for POWER should be
as simple as adding a new file under arch/power/, appending build
instructions to the build files and editing functable.c accordingly.
The UNALIGNED_OK flag is now also added by default for powerpc64le
targets.
Diffstat (limited to 'functable.c')
-rw-r--r-- | functable.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/functable.c b/functable.c index 1a203e3..aad8766 100644 --- a/functable.c +++ b/functable.c @@ -29,6 +29,7 @@ extern Pos quick_insert_string_sse4(deflate_state *const s, const Pos str); #elif defined(ARM_ACLE_CRC_HASH) extern Pos quick_insert_string_acle(deflate_state *const s, const Pos str); #endif + /* slide_hash */ #ifdef X86_SSE2 void slide_hash_sse2(deflate_state *s); @@ -115,6 +116,8 @@ ZLIB_INTERNAL void cpu_check_features(void) x86_check_features(); #elif ARM_CPUID arm_check_features(); +#elif POWER_FEATURES + power_check_features(); #endif features_checked = 1; } |