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| author | Duane Sand <duane.sand@imgtec.com> | 2014-07-14 15:30:14 -0700 |
|---|---|---|
| committer | Duane Sand <duane.sand@imgtec.com> | 2014-07-23 13:57:30 -0700 |
| commit | dd37251c473e1483faba0fd5aaf30e7a55582e8a (patch) | |
| tree | e944658c6ea3eafc732d7362dae7e8ce49206137 /libc/stdio/stdio_ext.cpp | |
| parent | 4d421901e587fd1563da94baf59b015017c01b91 (diff) | |
[MIPSR6] setjmp supports mips32r6 and FP64A/FPXX reg models
Save and restore floating point registers via 64-bit
load/stores when possible. Use assembler's builtin macro
ops to generate pairs of 32-bit load/stores on Mips I cpus.
Some cpus or FR modes have only 16 even-numbered dp fp regs.
This is exposed by _MIPS_FPSET, defined by existing compilers.
Change-Id: I7f617a3ffea8da41c402ef3a68ab32c91d3d7622
Diffstat (limited to 'libc/stdio/stdio_ext.cpp')
0 files changed, 0 insertions, 0 deletions