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Test: aosp_taimen-userdebug boots.
Test: m test-art-host-gtest
Test: testrunner.py --host --optimizing
Bug: 147346243
Change-Id: I97fdc15e568ae3fe390efb1da690343025f84944
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Rationale:
Previous CL introduced new check syntax
to define multiple target architectures.
This CL exploits the new feature.
Bug: 62352954
Test: test-art-host test-art-target
Change-Id: Ia2b9f210b0c1483e96e1df2d3d5e27f24420245d
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Rationale:
With more and more peeling and cleanup loops coming up,
some of our checker tests were a bit fragile testing for
the first Phi occurrence. This CL fixes that. Also fixes
a few omissions found during the refactoring.
Test: test-art-host test-art-target
Change-Id: I9b27237cf048981ca2b5a18057e09211b7002486
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Basic vectorization support with 64-bit vector length on ARM 32-bit
platforms (128-bit vectors require massive changes in register
allocator).
Test: test-art-target, test-art-host
Change-Id: I1d740146c3f00170fc033ae5fd69d59321ddcbf4
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MIPS64 implementation which uses MSA extension. Also extended all
relevant checker tests to test MIPS64 implementation.
Test: booted MIPS64R6 in QEMU
Test: ./testrunner.py --target --optimizing -j1 in QEMU
Change-Id: I8b8a2f601076bca1925e21213db8ed1d41d79b52
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Rationale:
Make SIMD great again with a retargetable and easily extendable vectorizer.
Provides a full x86/x86_64 and a proof-of-concept ARM implementation. Sample
improvement (without any perf tuning yet) for Linpack on x86 is about 20% to 50%.
Test: test-art-host, test-art-target (angler)
Bug: 34083438, 30933338
Change-Id: Ifb77a0f25f690a87cd65bf3d5e9f6be7ea71d6c1
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