Age | Commit message (Collapse) | Author |
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In InstructionWithAbsorbingInputSimplifier there is code optimizing a%1
and a%-1. So the code in InstructionCodeGeneratorARM64 optimizing such
cases can be deleted.
This patch deletes the code from InstructionCodeGeneratorARM64 and adds
additional tests.
Test: 012-math, 014-math3, 411-optimizing-arith, 411-checker-hdiv-hrem-pow2
Test: 701-easy-div-rem, 442-checker-constant-folding
Test: test-art-host, test-art-target
Change-Id: Ib80c0aa4c3e28b07fa79bb43783274c9d7fc456a
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And remove obsolete "doThrow" statements.
Test: testrunner.py --host -t 411-optimizing-arith
Change-Id: Ie44374c3ed007c7ffd0462ae4e8eef767bb28863
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Perform a copyright headers clean up mostly.
Change-Id: I26c855b2f54d0887676d9b9b8281b14b7978ab29
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Change-Id: I7cf6da1fd334a7177a5580931b8f174dd40b7cec
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This reverts commit 30ca3d847fe72cfa33e1b2473100ea2d8bea4517.
Change-Id: I188ca8d460d55d3a9966bcf31e0588575afa77d2
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This reverts commit 66ce173a40eff4392e9949ede169ccf3108be2db.
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- Add support for the neg-long (long integer two's
complement negate) instruction in the optimizing compiler.
- Add a 64-bit NEG instruction (negq) to the x86-64
assembler.
- Generate ARM, x86 and x86-64 code for integer HNeg nodes.
- Put neg-related tests into test/415-optimizing-arith-neg.
Change-Id: I1fbe9611e134408a6b8745d1df20ab6ffa5e50f2
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Change-Id: I61de8ce1d9e37e30db62e776979b3f22dc643894
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- Emit an RSB instruction for HNeg nodes in the ARM code
generator instead of RSBS, as we do not need to update the
condition code flags in this case.
- Simply punt when trying to statically evaluate a long
unary operation, instead of aborting.
- Move a test case to the right place.
Change-Id: I35eb8dea58ed35258d4d8df77181159c3ab07b6f
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- Add support for the neg-int (integer two's complement
negate) instruction in the optimizing compiler.
- Add a HNeg node type for control-flow graphs and an
intermediate HUnaryOperation base class.
- Generate ARM, x86 and x86-64 code for integer HNeg nodes.
Change-Id: I72fd3e1e5311a75c38a8cb665a9211a20325a42e
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This also fixes an issue where we could allocate a pair register even if
one of its parts was already blocked.
Change-Id: I4869175933409add2a56f1ccfb369c3d3dd3cb01
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