summaryrefslogtreecommitdiff
path: root/compiler/optimizing/instruction_simplifier_arm.cc
AgeCommit message (Collapse)Author
2020-06-19ART: Transform Sub+Sub into Sub+Add to merge ShlEvgeny Astigeevich
In the instruction sequence like the following: t1 = Shl(a, n) t2 = Sub(t1, *) r = Sub(*, t2) Shl cannot be merged with Sub. However it can be done when the first Sub operands are reordered and the second Sub is replaced with Add: t1 = Shl(a, n) t2 = Sub(*, t1) r = Add(*, t2) This CL implements this transformation in the ARM/ARM64 instruction simplifiers. Test: 411-checker-instruct-simplifier-hrem Test: test.py --host --optimizing --jit --gtest --interpreter Test: test.py --target --optimizing --jit --interpreter Test: run-gtests.sh Change-Id: I24fde29d307f3ad53a8df8bbafe945b4f733ce6c
2019-10-14Revert "Make compiler/optimizing/ symbols hidden."Vladimir Marko
This reverts commit e2727154f25e0db9a5bb92af494d8e47b181dfcf. Reason for revert: Breaks ASAN tests (ODR violation). Bug: 142365358 Change-Id: I38103d74a1297256c81d90872b6902ff1e9ef7a4
2019-10-14Make compiler/optimizing/ symbols hidden.Vladimir Marko
Make symbols in compiler/optimizing hidden by a namespace attribute. The unit intrinsic_objects.{h,cc} is excluded as it is needed by dex2oat. As the symbols are no longer exported, gtests are now linked with the static version of the libartd-compiler library. libart-compiler.so size: - before: arm: 2396152 arm64: 3345280 - after: arm: 2016176 (-371KiB, -15.9%) arm64: 2874480 (-460KiB, -14.1%) Test: m test-art-host-gtest Test: testrunner.py --host --optimizing --jit Bug: 142365358 Change-Id: I1fb04a33351f53f00b389a1642e81a68e40912a8
2018-12-27ART: Refactor for bugprone-argument-commentAndreas Gampe
Handles compiler. Bug: 116054210 Test: WITH_TIDY=1 mmma art Change-Id: I5cdfe73c31ac39144838a2736146b71de037425e
2018-10-25ARM64: Support interm. address for object arrays.Artem Serov
Support IntermediateAddress on arm64 for object array reads in Baker read barrier configuration. The patch brings minor boot.oat size reduction and performance improvement on Puzzle benchmark. Test: test-art-target, test-art-host, gc_stress. Test: 527-checker-array-access-split. Bug: 26601270 Bug: 32578862 Change-Id: I781a911905038b36428964a990771fdf74e99bbd
2018-08-28Use 'final' and 'override' specifiers directly in ART.Roland Levillain
Remove all uses of macros 'FINAL' and 'OVERRIDE' and replace them with 'final' and 'override' specifiers. Remove all definitions of these macros as well, which were located in these files: - libartbase/base/macros.h - test/913-heaps/heaps.cc - test/ti-agent/ti_macros.h ART is now using C++14; the 'final' and 'override' specifiers have been introduced in C++11. Test: mmma art Change-Id: I256c7758155a71a2940ef2574925a44076feeebf
2018-04-26Step 1 of 2: conditional passes.Aart Bik
Rationale: The change adds a return value to Run() in preparation of conditional pass execution. The value returned by Run() is best effort, returning false means no optimizations were applied or no useful information was obtained. I filled in a few cases with more exact information, others still just return true. In addition, it integrates inlining as a regular pass, avoiding the ugly "break" into optimizations1 and optimziations2. Bug: b/78171933, b/74026074 Test: test-art-host,target Change-Id: Ia39c5c83c01dcd79841e4b623917d61c754cf075
2017-11-27Fix stats reporting over 100% methods compiled.Vladimir Marko
Add statistics for intrinsic and native stub compilation and JIT failing to allocate memory for committing the code. Clean up recording of compilation statistics. New statistics when building aosp_taimen-userdebug boot image with --dump-stats: Attempted compilation of 94304 methods: 99.99% (94295) compiled. OptStat#AttemptBytecodeCompilation: 89487 OptStat#AttemptIntrinsicCompilation: 160 OptStat#CompiledNativeStub: 4733 OptStat#CompiledIntrinsic: 84 OptStat#CompiledBytecode: 89478 ... where 94304=89487+4733+84 and 94295=89478+4733+84. Test: testrunner.py -b --host --optimizing Test: Manually inspect output of building boot image with --dump-stats. Bug: 69627511 Change-Id: I15eb2b062a96f09a7721948bcc77b83ee4f18efd
2017-11-02ART: Make InstructionSet an enum class and add kLast.Vladimir Marko
Adding InstructionSet::kLast shall make it easier to encode the InstructionSet in fewer bits using BitField<>. However, introducing `kLast` into the `art` namespace is not a good idea, so we change the InstructionSet to an enum class. This also uncovered a case of InstructionSet::kNone being erroneously used instead of vixl32::Condition::None(), so it's good to remove `kNone` from the `art` namespace. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Change-Id: I6fa6168dfba4ed6da86d021a69c80224f09997a6
2017-10-06ART: Use ScopedArenaAllocator for pass-local data.Vladimir Marko
Passes using local ArenaAllocator were hiding their memory usage from the allocation counting, making it difficult to track down where memory was used. Using ScopedArenaAllocator reveals the memory usage. This changes the HGraph constructor which requires a lot of changes in tests. Refactor these tests to limit the amount of work needed the next time we change that constructor. Test: m test-art-host-gtest Test: testrunner.py --host Test: Build with kArenaAllocatorCountAllocations = true. Bug: 64312607 Change-Id: I34939e4086b500d6e827ff3ef2211d1a421ac91a
2017-10-02ARM/ARM64: Move simplifier visitors to .cc files.Vladimir Marko
Test: Rely on TreeHugger. Change-Id: Ib2cad20a4d6252812aaf6fa09a576bdfca423b70
2017-09-25ART: Introduce compiler data type.Vladimir Marko
Replace most uses of the runtime's Primitive in compiler with a new class DataType. This prepares for introducing new types, such as Uint8, that the runtime does not need to know about. Test: m test-art-host-gtest Test: testrunner.py --host Bug: 23964345 Change-Id: Iec2ad82454eec678fffcd8279a9746b90feb9b0c
2017-07-24ART: Include cleanupAndreas Gampe
Let clang-format reorder the header includes. Derived with: * .clang-format: BasedOnStyle: Google IncludeIsMainRegex: '(_test|-inl)?$' * Steps: find . -name '*.cc' -o -name '*.h' | xargs sed -i.bak -e 's/^#include/ #include/' ; git commit -a -m 'ART: Include cleanup' git-clang-format -style=file HEAD^ manual inspection git commit -a --amend Test: mmma art Change-Id: Ia963a8ce3ce5f96b5e78acd587e26908c7a70d02
2017-07-18ARM: VIXL32: Merge (un)signed extensions and integer additionsAnton Kirilov
Test: m test-art-target-run-test-551-checker-shifter-operand Change-Id: I041e80e51bf0954b38ab20dfa9b14aa7f6d6c53b
2017-07-17Remove the old ARM assemblers from ART.Roland Levillain
Now that the old ARM code generator for ART's Optimizing compiler is gone, these assemblers no longer have users; retiring them. Test: test.py Bug: 63316036 Change-Id: Iaea42432a9e0d3288b71615f85c58846c0336944
2017-04-21ART: Clean up art_method.hAndreas Gampe
Clean up the header. Fix up other headers including the -inl file, in an effort to prune the include graph. Fix broken transitive includes by making includes explicit. Introduce new -inl files for method handles and reference visiting. Test: source build/envsetup.sh && lunch aosp_angler-userdebug && mmma art Test: source build/envsetup.sh && lunch aosp_mips64-userdebug && mmma art Change-Id: I8f60f1160c2a702fdf3598149dae38f6fa6bc851
2017-02-17ARM: Merge data-processing instructions and shifts/(un)signed extensionsAnton Kirilov
This commit mirrors the work that has already been done for ARM64. Test: m test-art-target-run-test-551-checker-shifter-operand Change-Id: Iec8c1563b035f40f0e18dcffde28d91dc21922f8
2016-09-30String Compression for ARM and ARM64jessicahandojo
Changes on intrinsics and Code Generation on ARM and ARM64 for string compression feature. Currently the feature is off. The size of boot.oat and boot.art for ARM before and after the changes (feature OFF) are still. When the feature ON, boot.oat increased by 0.60% and boot.art decreased by 9.38%. Meanwhile for ARM64, size of boot.oat and boot.art before and after changes (feature OFF) are still. When the feature ON, boot.oat increased by 0.48% and boot.art decreased by 6.58%. Turn feature on: runtime/mirror/string.h (kUseStringCompression = true) runtime/asm_support.h (STRING_COMPRESSION_FEATURE 1) Test: m -j31 test-art-target All tests passed both when the mirror::kUseStringCompression is ON and OFF. Bug: 31040547 Change-Id: I24e86b99391df33ba27df747779b648c5a820649
2016-07-21ARM: Port instr simplification of array accesses.Artem Serov
After changing the addressing mode for array accesses (in https://android-review.googlesource.com/248406) the 'add' instruction that calculates the base address for the array can be shared across accesses to the same array. Before https://android-review.googlesource.com/248406: add IP, r[Array], r[Index0], LSL #2 ldr r0, [IP, #12] add IP, r[Array], r[Index1], LSL #2 ldr r0, [IP, #12] Before this CL: add IP. r[Array], #12 ldr r0, [IP, r[Index0], LSL #2] add IP. r[Array], #12 ldr r0, [IP, r[Index1], LSL #2] After this CL: add IP. r[Array], #12 ldr r0, [IP, r[Index0], LSL #2] ldr r0, [IP, r[Index1], LSL #2] Link to the original optimization: https://android-review.googlesource.com/#/c/127310/ Test: Run ART test suite on Nexus 6. Change-Id: Iee26f9a0a7ca46abb90e3f60d19d22dc8dee4d8f
2016-03-11Integrate BitwiseNegated into shared framework.Artem Serov
Share implementation between arm and arm64. Change-Id: I0dd12e772cb23b4c181fd0b1e2a447470b1d8702
2016-02-25Revert "Revert "ARM/ARM64: Extend support of instruction combining.""Artem Udovichenko
This reverts commit 6b5afdd144d2bb3bf994240797834b5666b2cf98. Change-Id: Ic27a10f02e21109503edd64e6d73d1bb0c6a8ac6
2016-01-22Revert "ARM/ARM64: Extend support of instruction combining."Nicolas Geoffray
The test fails its checker parts. This reverts commit debeb98aaa8950caf1a19df490f2ac9bf563075b. Change-Id: I49929e15950c7814da6c411ecd2b640d12de80df
2016-01-21ARM/ARM64: Extend support of instruction combining.Ilmir Usmanov
Combine multiply instructions in the following way: ARM64: MUL/NEG -> MNEG ARM32 (32-bit integers only): MUL/ADD -> MLA MUL/SUB -> MLS Change-Id: If20f2d8fb060145ab6fbceeb5a8f1a3d02e0ecdb
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-03 14:20:18 +0000