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AgeCommit message (Collapse)Author
2014-06-12Final CL to enable register allocation on x86.Nicolas Geoffray
This CL implements: 1) Resolution after allocation: connecting the locations allocated to an interval within a block and between blocks. 2) Handling of fixed registers: some instructions require inputs/output to be at a specific location, and the allocator needs to deal with them in a special way. 3) ParallelMoveResolver::EmitNativeCode for x86. Change-Id: I0da6bd7eb66877987148b87c3be6a983b4e3f858
2014-05-19Now we have a proper C++ library, use std::unique_ptr.Ian Rogers
Also remove the Android.libcxx.mk and other bits of stlport compatibility mechanics. Change-Id: Icdf7188ba3c79cdf5617672c1cfd0a68ae596a61
2014-03-31Add support for adding two integers in optimizing compiler.Nicolas Geoffray
Change-Id: I5524e193cd07f2692a57c6b4f8069904471b2928
2014-03-18Plug new optimizing compiler in compilation pipeline.Nicolas Geoffray
Also rename accessors to ART's conventions. Change-Id: I344807055b98aa4b27215704ec362191464acecc
2014-03-13Fix non-{arm, x86} builds.Nicolas Geoffray
Change-Id: If4c13775f8e1fd0fd26b4a731f3011c77b0bfed1
2014-03-13More code generation for the optimizing compiler.Nicolas Geoffray
- Add HReturn instruction - Generate code for locals/if/return - Setup infrastructure for register allocation. Currently emulate a stack. Change-Id: Ib28c2dba80f6c526177ed9a7b09c0689ac8122fb
2014-03-10Add register support to the optimizing compiler.Nicolas Geoffray
Also make if take an input and build the use list for instructions. Change-Id: I1938cee7dce5bd4c66b259fa2b431d2c79b3cf82
2014-03-04Add codegen support to the optimizing compiler.Nicolas Geoffray
Change-Id: I9aae76908ff1d6e64fb71a6718fc1426b67a5c28
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