summaryrefslogtreecommitdiff
path: root/compiler/optimizing/code_generator_arm.cc
AgeCommit message (Collapse)Author
2015-10-14Added support for unsigned comparisonsAart Bik
Rationale: even though not directly supported in input graph, having the ability to express unsigned comparisons in HIR is useful for all sorts of optimizations. Change-Id: I4543c96a8c1895c3d33aaf85685afbf80fe27d72
2015-10-14Merge "Improve Thumb2 bitwise operations."Vladimir Marko
2015-10-14Improve Thumb2 bitwise operations.Vladimir Marko
Allow embedding constants in AND, ORR, EOR. Add ORN to assembler, use BIC and ORN for AND and ORR when needed. Change-Id: I24d69ecc7ce6992b9c5eb7a313ff47a942de9661
2015-10-13Implement System.arraycopy intrinsic for arm.Nicolas Geoffray
Change-Id: I58ae1af5103e281fe59fbe022b718d6d8f293a5e
2015-10-08Add DCHECKs to ArenaVector and ScopedArenaVector.Vladimir Marko
Implement dchecked_vector<> template that DCHECK()s element access and insert()/emplace()/erase() positions. Change the ArenaVector<> and ScopedArenaVector<> aliases to use the new template instead of std::vector<>. Remove DCHECK()s that have now become unnecessary from the Optimizing compiler. Change-Id: Ib8506bd30d223f68f52bd4476c76d9991acacadc
2015-10-06Fix location summary for LoadClassCalin Juravle
Don't request a register for the current method if we're gonna call the runtime. Change-Id: I9760d15108bd95efb2a34e6eacd84b60841781d7
2015-10-06Add support for unresolved classes in optimizing.Calin Juravle
Change-Id: I0e299a81e560eb9cb0737ec46125dffc99333b54
2015-10-05Block callee save fp registers in debuggable.Nicolas Geoffray
This is a simple but conservative implementation. We could extend it by using the registers but still saving them before a call and at method entry. bug: 21057237 Change-Id: Ia2e9e0e2efae0b01625e0f4165d0535c4bf9ba62
2015-10-05Merge "Revert "Don't use floating point callee saves in debuggable.""Nicolas Geoffray
2015-10-05Revert "Don't use floating point callee saves in debuggable."Nicolas Geoffray
bug:24602865 bug:24605078 This reverts commit 88a95ba893fcda974d492917dd77a9b11693dbf2. Change-Id: Iba97eeab5c2ba725f66cc138f740dac337344828
2015-10-02Revert "Revert "Support unresolved fields in optimizing"Calin Juravle
The CL also changes the calling convetion for 64bit static field set to use kArg2 instead of kArg1. This allows optimizing to keep the asumptions: - arm pairs are always of form (even_reg, odd_reg) - ecx_edx is not used as a register on x86. This reverts commit e6f49b47b6a4dc9c7684e4483757872cfc7ff1a1. Change-Id: I93159917565824084abc96775f31be1a4249f2f3
2015-10-01Merge "Optimize ArraySet for x86/x64/arm/arm64."Nicolas Geoffray
2015-09-30Merge "Don't use floating point callee saves in debuggable."Nicolas Geoffray
2015-09-30Don't use floating point callee saves in debuggable.Nicolas Geoffray
The runtime stubs don't save them, so GetVReg and SetVReg won't work on them. Not having callee saves will increase code size and reduce performance of fp-heavy methods. But we need to do it for propper debugging. Change-Id: I40354c29718af49b6b3adf61d724d3bb93680107
2015-09-30Optimize ArraySet for x86/x64/arm/arm64.Nicolas Geoffray
Change-Id: I5bc8c6adf7f82f3b211f0c21067f5bb54dd0c040
2015-09-29Optimizing: Tag even more arena allocations.Vladimir Marko
Tag previously "Misc" arena allocations with more specific allocation types. Move some native heap allocations to the arena in BCE. Bug: 23736311 Change-Id: If8ef15a8b614dc3314bdfb35caa23862c9d4d25c
2015-09-29Optimizing: Tag arena allocations in code generators.Vladimir Marko
And completely remove the deprecated GrowableArray. Replace GrowableArray with ArenaVector in code generators and related classes and tag arena allocations. Label arrays use direct allocations from ArenaAllocator because Label is non-copyable and non-movable and as such cannot be really held in a container. The GrowableArray never actually constructed them, instead relying on the zero-initialized storage from the arena allocator to be correct. We now actually construct the labels. Also avoid StackMapStream::ComputeDexRegisterMapSize() being passed null references, even though unused. Change-Id: I26a46fdd406b23a3969300a67739d55528df8bf4
2015-09-22Merge "[optimizing] Add basic PackedSwitch support"Andreas Gampe
2015-09-22Further refinements to checkcast/instanceof.Nicolas Geoffray
- Use setcc when possible. - Do an exact check in the Object[] case before checking the component type. Change-Id: Ic11c60643af9b41fe4ef2beb59dfe7769bef388f
2015-09-21[optimizing] Add basic PackedSwitch supportMark Mendell
Add HPackedSwitch, and generate it from the builder. Code generators convert this to a series of compare/branch tests. Better implementation in the code generators as a real jump table will follow as separate CLs. Change-Id: If14736fa4d62809b6ae95280148c55682e856911 Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
2015-09-18Revert "Revert "Optimize code generation of check-cast and instance-of.""Nicolas Geoffray
This reverts commit 7537437c6a2f89249a48e30effcc27d4e7c5a04f. Change-Id: If759cb08646e47b62829bebc3c5b1e2f2969cf84
2015-09-17ART: Refactor intrinsics slow-pathsAndreas Gampe
Refactor slow paths so that there is a default implementation for common cases (only arm64 with vixl is special). Write a generic intrinsic slow-path that can be reused for the specific architectures. Move helper functions into CodeGenerator so that they are accessible. Change-Id: Ibd788dce432601c6a9f7e6f13eab31f28dcb8550
2015-09-17Merge "Revert "Optimize code generation of check-cast and instance-of.""Nicolas Geoffray
2015-09-17Revert "Optimize code generation of check-cast and instance-of."Nicolas Geoffray
Failures with libcore tests. This reverts commit 64acf303eaa2f32c0b1d8cfcbf044a822c5eec08. Change-Id: Ie6f323fcf5d86bae5c334c1352bb21f1bad60a88
2015-09-17Merge "Optimize code generation of check-cast and instance-of."Nicolas Geoffray
2015-09-17Revert "Support unresolved fields in optimizing"Calin Juravle
breaks debuggable tests. This reverts commit 23a8e35481face09183a24b9d11e505597c75ebb. Change-Id: I8e60b5c8f48525975f25d19e5e8066c1c94bd2e5
2015-09-17Optimize code generation of check-cast and instance-of.Nicolas Geoffray
On x86/x64/arm/arm64. Improve code size of selected apks from 0.3% to 1%, and performance of DeltaBlue by 20%. Change-Id: Ib5799f7a53443cd880a121dd7f21932ae9f5c7aa
2015-09-17Support unresolved fields in optimizingCalin Juravle
Change-Id: I9941fa5fcb6ef0a7a253c7a0b479a44a0210aad4
2015-09-17Support unresolved methods in OptimizingCalin Juravle
Change-Id: If2da02b50d2fa668cd58f134a005f1752e7746b1
2015-09-16Merge "Add OptimizingCompilerStats to the CodeGenerator class."Calin Juravle
2015-09-16Optimizing: Tag arena allocations in HGraph.Vladimir Marko
Replace GrowableArray with ArenaVector in HGraph and related classes HEnvironment, HLoopInformation, HInvoke and HPhi, and tag allocations with new arena allocation types. Change-Id: I3d79897af405b9a1a5b98bfc372e70fe0b3bc40d
2015-09-15Revert "Revert "ART: Register allocation and runtime support for try/catch""David Brazdil
The original CL triggered b/24084144 which has been fixed by Ib72e12a018437c404e82f7ad414554c66a4c6f8c. This reverts commit 659562aaf133c41b8d90ec9216c07646f0f14362. Change-Id: Id8980436172457d0fcb276349c4405f7c4110a55
2015-09-14Revert "ART: Register allocation and runtime support for try/catch"David Brazdil
Breaks libcore test org.apache.harmony.security.tests.java.security.KeyStorePrivateKeyEntryTest#testGetCertificateChain. Need to investigate. This reverts commit b022fa1300e6d78639b3b910af0cf85c43df44bb. Change-Id: Ib24d3a80064d963d273e557a93469c95f37b1f6f
2015-09-14ART: Register allocation and runtime support for try/catchDavid Brazdil
This patch completes a series of CLs that add support for try/catch in the Optimizing compiler. With it, Optimizing can compile all methods containing try/catch, provided they don't contain catch loops. Future work will focus on improving performance of the generated code. SsaLivenessAnalysis was updated to propagate liveness information of instructions live at catch blocks, and to keep location information on instructions which may be caught by catch phis. RegisterAllocator was extended to spill values used after catch, and to allocate spill slots for catch phis. Catch phis generated for the same vreg share a spill slot as the raw value must be the same. Location builders and slow paths were updated to reflect the fact that throwing an exception may not lead to escaping the method. Instruction code generators are forbidden from using of implicit null checks in try blocks as live registers need to be saved before handing over to the runtime. CodeGenerator emits a stack map for each catch block, storing locations of catch phis. CodeInfo and StackMapStream recognize this new type of stack map and store them separate from other stack maps to avoid dex_pc conflicts. After having found the target catch block to deliver an exception to, QuickExceptionHandler looks up the dex register maps at the throwing instruction and the catch block and copies the values over to their respective locations. The runtime-support approach was selected because it allows for the best performance in the normal control-flow path, since no propagation of catch phi values is necessary until the exception is thrown. In addition, it also greatly simplifies the register allocation phase. ConstantHoisting was removed from LICMTest because it instantiated (now abstract) HConstant and was bogus anyway (constants are always in the entry block). Change-Id: Ie31038ad8e3ee0c13a5bbbbaf5f0b3e532310e4e
2015-09-10ART: Fix Quick-style LR vs PC core spill mask bugAndreas Gampe
It's always been a bug that Quick marked PC as spilled instead of LR. The root cause was a mutation of the spill mask at frame exit, when LR is being restored into PC to return. A local should have been used to keep the actual spill mask safe and sound. This has only worked because nobody ever uses LR, even after long jumps for exception dispatch. However, single-frame deoptimization needs this to work, and I'd rather fix this than being forced to have machine-specific fixups. Also fix in optimizing, and bump the oat version. Change-Id: Ib032a533408bf464097fc96dcbfc5b6a68bf59a1
2015-09-08Revert "Revert "Do a second check for testing intrinsic types.""Andreas Gampe
This reverts commit a14b9fef395b94fa9a32147862c198fe7c22e3d7. When an intrinsic with invoke-type virtual is recognized, replace the instruction with a new HInvokeStaticOrDirect. Minimal update for dex-cache rework. Fix includes. Change-Id: I1c8e735a2fa7cda4419f76ca0717125ef236d332
2015-09-04Merge "ART: Move DexCache arrays to native."Vladimir Marko
2015-09-03ART: Move DexCache arrays to native.Vladimir Marko
This CL has a companion CL in libcore/ https://android-review.googlesource.com/162985 Change-Id: Icbc9e20ad1b565e603195b12714762bb446515fa
2015-09-01Merge "SlowPath: Remove the use of Locations in the SlowPath constructors."Nicolas Geoffray
2015-09-01ART: Add 16-bit Thumb2 ROR, NEGS and CMP for high registers.Vladimir Marko
Also clean up the usage of set_cc flag. Define a SetCc enumeration that specifies whether to set or keep condition codes or whether we don't care and a 16-bit instruction should be selected if one exists. This reduces the size of Nexus 5 boot.oat by 44KiB (when compiled with Optimizing which is not the default yet). Change-Id: I047072dc197ea678bf2019c01bcb28943fa9b604
2015-08-27SlowPath: Remove the use of Locations in the SlowPath constructors.Serban Constantinescu
The main motivation is that using locations in the SlowPath constructors ties us to creating the SlowPaths after register allocation, since before the locations are invalid. A later patch of the series will be moving the SlowPath creation to the LocationsBuilder visitors. This will enable us to add more checking as well as consider sharing multiple SlowPaths of the same type. Change-Id: I7e96dcc2b5586d15153c942373e9281ecfe013f0 Signed-off-by: Serban Constantinescu <serban.constantinescu@linaro.org>
2015-08-27Add OptimizingCompilerStats to the CodeGenerator class.Serban Constantinescu
Just refactoring, not yet used, but will be used by the incoming patch series and future CodeGen specific stats. Change-Id: I7d20489907b82678120518a77bdab9c4cc58f937 Signed-off-by: Serban Constantinescu <serban.constantinescu@linaro.org>
2015-08-19Revert "Revert "Optimizing: Better invoke-static/-direct dispatch.""Vladimir Marko
Fixed kCallArtMethod to use correct callee location for kRecursive. This combination is used when compiling with debuggable flag set. This reverts commit b2c431e80e92eb6437788cc544cee6c88c3156df. Change-Id: Idee0f2a794199ebdf24892c60f8a5dcf057db01c
2015-08-19Revert "Optimizing: Better invoke-static/-direct dispatch."Vladimir Marko
Reverting due to failing ndebug tests. This reverts commit 9b688a095afbae21112df5d495487ac5231b12d0. Change-Id: Ie4f69da6609df3b7c8443412b6cf7f5c43c2c5d9
2015-08-19Optimizing: Better invoke-static/-direct dispatch.Vladimir Marko
Add framework for different types of loading ArtMethod* and code pointer retrieval. Implement invoke-static and invoke-direct calls the same way as Quick. Document the dispatch kinds in HInvokeStaticOrDirect's new enumerations MethodLoadKind and CodePtrLocation. PC-relative loads from dex cache arrays are used only for x86-64 and arm64. The implementation for other architectures will be done in separate CLs. Change-Id: I468ca4d422dbd14748e1ba6b45289f0d31734d94
2015-08-12Add a GVN dependency 'GC' for garbage collection.Alexandre Rames
This will be used by incoming architecture specific optimizations. The dependencies must be conservative. When an HInstruction is created we may not be sure whether it can trigger GC. In that case the 'ChangesGC' dependency must be set. We control at code-generation time that HInstructions that can call have the 'ChangesGC' dependency set. Change-Id: Iea6a7f430009f37a9599b0a0039207049906e45d
2015-08-11Merge "ART-Optimizing: Fix the type of HDivZeroCheck"Calin Juravle
2015-08-11ART-Optimizing: Fix the type of HDivZeroCheckSerguei Katkov
HDivZeroCheck is created during the building CFG and at this moment its type is not known completely. So it sets the type to int or long. However, later SSA builder can insert the type conversion and type of input of HDivZeroCheck can become byte or short while the type of HDivZeroCheck remains the same. In reality the type of HDivZeroCheck should be always equal to its input parameter. To fix this inconsistency we return the type of HDivZeroCheck as its input type. Code generators are updated accordingly. Change-Id: I6a5aedc8d479cfc6328704e7ddf252bca830076b Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
2015-08-07Ensure coherency of call kinds for LocationSummary.Alexandre Rames
The coherency is enforced with checks added in the `InvokeRuntime` helper, that we now also use on x86 and x86_64. Change-Id: I8cb92b042f25dc3c5fd390e9c61a45b477d081f4
2015-08-04ART: Move exception clearing into own instructionDavid Brazdil
Runtime delivers exceptions only to catch blocks which begin with a MOVE_EXCEPTION instruction (in DEX). In that case, the catch block is expected to clear the thread-local exception storage after having read the exception reference. This patch changes Optimizing to represent MOVE_EXCEPTION with two instructions - HLoadException and HClearException - instead of one. If the exception reference is not used, HLoadException can be safely removed, saving a memory load without breaking the runtime behaviour. Change-Id: Idad8a714467bf9d9d5fccefbc43c0bd8ae13ddba
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-04 19:44:29 +0000