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| author | Orion Hodson <oth@google.com> | 2017-07-21 11:42:10 +0100 |
|---|---|---|
| committer | Orion Hodson <oth@google.com> | 2017-07-25 11:06:33 +0100 |
| commit | f7337c0a06acd0d3eeac4ddc8441744a869e318d (patch) | |
| tree | 935868893ab660e139d4aa2cc3e08527d2361c01 /test/ProfileTestMultiDex/Second.java | |
| parent | c34fa109550225d961f10554ec63ea4c101ffcdf (diff) | |
Jit Code Cache instruction pipeline flushing
Restores instruction pipeline flushing on all cores following crashes
on ARMv7 with dual JIT code page mappings. We were inadvertantly
toggling permission on a non-executable page rather than executable.
Removes the data cache flush for roots data and replaces it with a
sequentially consistent barrier.
Fix MemMap::RemapAtEnd() when all pages are given out. To meet
invariants checked in the destructor, the base pointer needs to be
assigned as nullptr when this happens.
Bug: 63833411
Bug: 62332932
Test: art/test.py --target
Change-Id: I705cf5a3c80e78c4e912ea3d2c3c4aa89dee26bb
(cherry picked from commit 56fe32eecd4f25237e66811fd766355a07908d22)
Diffstat (limited to 'test/ProfileTestMultiDex/Second.java')
0 files changed, 0 insertions, 0 deletions