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| author | Nicolas Geoffray <ngeoffray@google.com> | 2014-12-09 14:26:32 +0000 |
|---|---|---|
| committer | Nicolas Geoffray <ngeoffray@google.com> | 2014-12-09 14:49:02 +0000 |
| commit | 376b2bbf7c39108223a7a01568a7b4b04d84eeac (patch) | |
| tree | f6fdbe6180c3d330bc24aa35a7d9fa51f3eb1c55 /compiler/optimizing/stack_map_stream.h | |
| parent | b1a38e246cfbfb21100d9c9e57f33970e824f075 (diff) | |
Ensure stack maps are 4 byte aligned.
With the recent move to gcc 4.9, we are hitting alignment
SIGBUS on ARM. The reason is that gcc will optimize two consecutive
32bits loads into one 64bits load, and the instruction (ldrd)
will fail if the data is not aligned.
Also removed the emission of mapping table when a method is optimized.
The information can be found in the StackMap itself.
Change-Id: Icf79406c18a3f4db3c05d52fc2c0dd2e35bf0f8f
Diffstat (limited to 'compiler/optimizing/stack_map_stream.h')
| -rw-r--r-- | compiler/optimizing/stack_map_stream.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/compiler/optimizing/stack_map_stream.h b/compiler/optimizing/stack_map_stream.h index 9cfa71c13f..3974e53e6f 100644 --- a/compiler/optimizing/stack_map_stream.h +++ b/compiler/optimizing/stack_map_stream.h @@ -111,7 +111,7 @@ class StackMapStream : public ValueObject { } size_t ComputeStackMapSize() const { - return stack_maps_.Size() * (StackMap::kFixedSize + StackMaskEncodingSize(stack_mask_max_)); + return stack_maps_.Size() * StackMap::ComputeAlignedStackMapSize(stack_mask_max_); } size_t ComputeDexRegisterMapSize() const { |