diff options
author | Artem Serov <artem.serov@linaro.org> | 2017-04-03 18:47:32 +0100 |
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committer | Artem Serov <artem.serov@linaro.org> | 2017-04-10 11:43:33 +0100 |
commit | d4bccf1ece319a3a99e03ecbcbbf40bb82b9e331 (patch) | |
tree | 2890740d9cab3eee2be223666f528c6707b89f90 /compiler/optimizing/loop_optimization.cc | |
parent | 903b8169074c01590ab3f5ad9190d9c7e3fe795b (diff) |
ARM64: Support 128-bit registers for SIMD.
Test: test-art-host, test-art-target
Change-Id: Ifb931a99d34ea77602a0e0781040ed092de9faaa
Diffstat (limited to 'compiler/optimizing/loop_optimization.cc')
-rw-r--r-- | compiler/optimizing/loop_optimization.cc | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/compiler/optimizing/loop_optimization.cc b/compiler/optimizing/loop_optimization.cc index bf18cc9bbc..ec02127bee 100644 --- a/compiler/optimizing/loop_optimization.cc +++ b/compiler/optimizing/loop_optimization.cc @@ -770,22 +770,21 @@ bool HLoopOptimization::TrySetVectorType(Primitive::Type type, uint64_t* restric return false; case kArm64: // Allow vectorization for all ARM devices, because Android assumes that - // ARMv8 AArch64 always supports advanced SIMD. For now, only D registers - // (64-bit vectors) not Q registers (128-bit vectors). + // ARMv8 AArch64 always supports advanced SIMD. switch (type) { case Primitive::kPrimBoolean: case Primitive::kPrimByte: *restrictions |= kNoDiv | kNoAbs; - return TrySetVectorLength(8); + return TrySetVectorLength(16); case Primitive::kPrimChar: case Primitive::kPrimShort: *restrictions |= kNoDiv | kNoAbs; - return TrySetVectorLength(4); + return TrySetVectorLength(8); case Primitive::kPrimInt: *restrictions |= kNoDiv; - return TrySetVectorLength(2); + return TrySetVectorLength(4); case Primitive::kPrimFloat: - return TrySetVectorLength(2); + return TrySetVectorLength(4); default: return false; } |