diff options
author | Aart Bik <ajcbik@google.com> | 2017-04-12 15:52:08 +0000 |
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committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2017-04-12 15:52:08 +0000 |
commit | 4766f2cd27c3de80eb74c302a9eb4cc7c97e5de1 (patch) | |
tree | 3d48ecee6d98502c25fba27e854c89ae02e169b7 /compiler/optimizing/loop_optimization.cc | |
parent | 279fbab663f3d9f58047fd57197a710e08e4c693 (diff) | |
parent | b31f91fd1811c9047591282dd003cf22b54938a1 (diff) |
Merge changes I1d4db176,Ifb931a99
* changes:
ARM64: Support vectorization for double and long.
ARM64: Support 128-bit registers for SIMD.
Diffstat (limited to 'compiler/optimizing/loop_optimization.cc')
-rw-r--r-- | compiler/optimizing/loop_optimization.cc | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/compiler/optimizing/loop_optimization.cc b/compiler/optimizing/loop_optimization.cc index cf7acb36d1..4710b32e9c 100644 --- a/compiler/optimizing/loop_optimization.cc +++ b/compiler/optimizing/loop_optimization.cc @@ -776,21 +776,25 @@ bool HLoopOptimization::TrySetVectorType(Primitive::Type type, uint64_t* restric return false; case kArm64: // Allow vectorization for all ARM devices, because Android assumes that - // ARMv8 AArch64 always supports advanced SIMD. For now, only D registers - // (64-bit vectors) not Q registers (128-bit vectors). + // ARMv8 AArch64 always supports advanced SIMD. switch (type) { case Primitive::kPrimBoolean: case Primitive::kPrimByte: *restrictions |= kNoDiv | kNoAbs; - return TrySetVectorLength(8); + return TrySetVectorLength(16); case Primitive::kPrimChar: case Primitive::kPrimShort: *restrictions |= kNoDiv | kNoAbs; - return TrySetVectorLength(4); + return TrySetVectorLength(8); case Primitive::kPrimInt: *restrictions |= kNoDiv; + return TrySetVectorLength(4); + case Primitive::kPrimLong: + *restrictions |= kNoDiv | kNoMul; return TrySetVectorLength(2); case Primitive::kPrimFloat: + return TrySetVectorLength(4); + case Primitive::kPrimDouble: return TrySetVectorLength(2); default: return false; |