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| author | Aart Bik <ajcbik@google.com> | 2016-08-01 15:55:36 -0700 |
|---|---|---|
| committer | Aart Bik <ajcbik@google.com> | 2016-08-01 16:11:10 -0700 |
| commit | 33dd909468e377aaa8f0ec27fc4b3cb4d8481119 (patch) | |
| tree | fc6c11800d7fa7ace2f44d0bf863f23b54084a18 /compiler/optimizing/graph_visualizer.cc | |
| parent | e304fc28c4a7d57532498239f9b52d2d5b8974d5 (diff) | |
Fixed bug in disassembly of roundss/roundsd
Rationale:
These instructions should be marked as load, so that, using
Intel syntax, destination (xmm0) appears at left hand side, as in
roundss xmm0, xmm1
and not the other way around. First I suspected a bug in the
encoding (hence the test) and even the register allocator, but
since the code behaved correctly, only disassembly was really wrong.
Test: disassembler_x86_test (but nothing for actual disassembly)
BUG=26327751
Change-Id: I060ef57f4d5a64cdc04b97ae8a799d1c0d22da05
Diffstat (limited to 'compiler/optimizing/graph_visualizer.cc')
0 files changed, 0 insertions, 0 deletions