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authorGoran Jakovljevic <goran.jakovljevic@mips.com>2017-12-14 10:25:20 +0100
committerGoran Jakovljevic <goran.jakovljevic@mips.com>2017-12-15 17:33:12 +0100
commite7de5ec3e4cd1d607b647d98ea64df105479b867 (patch)
treed692c4d1dee08eea4beffd71bd8cdf1d106c059e /compiler/optimizing/codegen_test_utils.h
parentbee510c94560703102ca553a08ec47119959c204 (diff)
MIPS: Support swaps between 128-bit locations
Add support for swaps between two SIMDStackSlots, two VectorRegisters (extended FpuRegister) and between a SIMDStackSlot and a VectorRegister. This fixes test 623-checker-loop-regressions for MIPS64R6 and MIPS32R6. Test: ./testrunner.py --optimizing --target in QEMU (MIPS64R6) Test: ./testrunner.py --optimizing --target in QEMU (MIPS32R6) Change-Id: I36aa209f79790fb6c08b9a171f810769a6b40afc
Diffstat (limited to 'compiler/optimizing/codegen_test_utils.h')
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