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| author | Chris Larsen <chris.larsen@imgtec.com> | 2017-10-23 11:00:32 -0700 |
|---|---|---|
| committer | Chris Larsen <chris.larsen@imgtec.com> | 2017-10-23 11:00:32 -0700 |
| commit | 715f43e1553330bc804cea2951be195473dc343d (patch) | |
| tree | 55e143005efe10e8448c91eff6b88a635af2a3f6 /compiler/optimizing/codegen_test_utils.h | |
| parent | 9e842d3e7d6102d964178e36e5d596ca91895147 (diff) | |
MIPS32: Improve stack alignment, use sdc1/ldc1, where possible.
- Ensure that SP is a multiple of 16 at all times, and
- Use ldc1/sdc1 to load/store FPU registers from/to 8-byte-aligned
locations wherever possible.
Use `export ART_MIPS32_CHECK_ALIGNMENT=true` when building Android
to enable the new runtime alignment checks.
Test: Boot & run tests on 32-bit version of QEMU, and CI-20.
Test: test/testrunner/testrunner.py --target --optimizing --32
Test: test-art-host-gtest
Test: test-art-target-gtest
Change-Id: Ia667004573f419fd006098fcfadf5834239cb485
Diffstat (limited to 'compiler/optimizing/codegen_test_utils.h')
0 files changed, 0 insertions, 0 deletions