diff options
author | Roland Levillain <rpl@google.com> | 2017-08-11 10:26:39 +0000 |
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committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2017-08-11 10:26:39 +0000 |
commit | 54636c0e85ad1bcd5798324c0484122364e99298 (patch) | |
tree | 6ec47505bdb6dd232cf43b86eb9d2c438d2f052f /compiler/optimizing/codegen_test_utils.h | |
parent | abafaf83838301b83832c33324d683e7f77aff76 (diff) | |
parent | 2b03a1f24600c8c9558fb13d3f8bca1ef0f8ee40 (diff) |
Merge "Instrument ARM64 generated code to check the Marking Register."
Diffstat (limited to 'compiler/optimizing/codegen_test_utils.h')
-rw-r--r-- | compiler/optimizing/codegen_test_utils.h | 42 |
1 files changed, 38 insertions, 4 deletions
diff --git a/compiler/optimizing/codegen_test_utils.h b/compiler/optimizing/codegen_test_utils.h index cada2e679b..bdd105fce7 100644 --- a/compiler/optimizing/codegen_test_utils.h +++ b/compiler/optimizing/codegen_test_utils.h @@ -103,6 +103,40 @@ class TestCodeGeneratorARMVIXL : public arm::CodeGeneratorARMVIXL { }; #endif +#ifdef ART_ENABLE_CODEGEN_arm64 +// Special ARM64 code generator for codegen testing in a limited code +// generation environment (i.e. with no runtime support). +// +// Note: If we want to exercise certains HIR constructions +// (e.g. reference field load in Baker read barrier configuration) in +// codegen tests in the future, we should also: +// - save the Thread Register (X19) and possibly the Marking Register +// (X20) before entering the generated function (both registers are +// callee-save in AAPCS64); +// - set these registers to meaningful values before or upon entering +// the generated function (so that generated code using them is +// correct); +// - restore their original values before leaving the generated +// function. +class TestCodeGeneratorARM64 : public arm64::CodeGeneratorARM64 { + public: + TestCodeGeneratorARM64(HGraph* graph, + const Arm64InstructionSetFeatures& isa_features, + const CompilerOptions& compiler_options) + : arm64::CodeGeneratorARM64(graph, isa_features, compiler_options) {} + + void MaybeGenerateMarkingRegisterCheck(int codem ATTRIBUTE_UNUSED, + Location temp_loc ATTRIBUTE_UNUSED) OVERRIDE { + // When turned on, the marking register checks in + // CodeGeneratorARM64::MaybeGenerateMarkingRegisterCheck expect the + // Thread Register and the Marking Register to be set to + // meaningful values. This is not the case in codegen testing, so + // just disable them entirely here (by doing nothing in this + // method). + } +}; +#endif + #ifdef ART_ENABLE_CODEGEN_x86 class TestCodeGeneratorX86 : public x86::CodeGeneratorX86 { public: @@ -263,7 +297,8 @@ static void RunCode(CodegenTargetConfig target_config, bool has_result, Expected expected) { CompilerOptions compiler_options; - std::unique_ptr<CodeGenerator> codegen(target_config.CreateCodeGenerator(graph, compiler_options)); + std::unique_ptr<CodeGenerator> codegen(target_config.CreateCodeGenerator(graph, + compiler_options)); RunCode(codegen.get(), graph, hook_before_codegen, has_result, expected); } @@ -280,9 +315,8 @@ CodeGenerator* create_codegen_arm_vixl32(HGraph* graph, const CompilerOptions& c CodeGenerator* create_codegen_arm64(HGraph* graph, const CompilerOptions& compiler_options) { std::unique_ptr<const Arm64InstructionSetFeatures> features_arm64( Arm64InstructionSetFeatures::FromCppDefines()); - return new (graph->GetArena()) arm64::CodeGeneratorARM64(graph, - *features_arm64.get(), - compiler_options); + return new (graph->GetArena()) + TestCodeGeneratorARM64(graph, *features_arm64.get(), compiler_options); } #endif |