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authorRoland Levillain <rpl@google.com>2015-08-18 17:43:29 +0000
committerGerrit Code Review <noreply-gerritcodereview@google.com>2015-08-18 17:43:29 +0000
commitfc5b096fcddb0ddb2d01e2b28e86ed5a02d37b2e (patch)
treef8dd85956a04299153b1b02e1c9900cec37397d6 /compiler/optimizing/codegen_test.cc
parenta539ec06503766fcad4be71480c194a225fb037c (diff)
parent17ff917877041a6f212537e062f06684adcbf171 (diff)
Merge "Fix codegen_test."
Diffstat (limited to 'compiler/optimizing/codegen_test.cc')
-rw-r--r--compiler/optimizing/codegen_test.cc13
1 files changed, 10 insertions, 3 deletions
diff --git a/compiler/optimizing/codegen_test.cc b/compiler/optimizing/codegen_test.cc
index 715eca41da..28fc816ac3 100644
--- a/compiler/optimizing/codegen_test.cc
+++ b/compiler/optimizing/codegen_test.cc
@@ -121,8 +121,15 @@ class InternalCodeAllocator : public CodeAllocator {
DISALLOW_COPY_AND_ASSIGN(InternalCodeAllocator);
};
+static bool CanExecuteOnHardware(InstructionSet target_isa) {
+ return (target_isa == kRuntimeISA)
+ // Handle the special case of ARM, with two instructions sets
+ // (ARM32 and Thumb-2).
+ || (kRuntimeISA == kArm && target_isa == kThumb2);
+}
+
static bool CanExecute(InstructionSet target_isa) {
- return (target_isa == kRuntimeISA) || CodeSimulator::CanSimulate(target_isa);
+ return CanExecuteOnHardware(target_isa) || CodeSimulator::CanSimulate(target_isa);
}
template <typename Expected>
@@ -151,7 +158,7 @@ static void VerifyGeneratedCode(InstructionSet target_isa,
Expected (*f)(),
bool has_result,
Expected expected) {
- ASSERT_TRUE(CanExecute(target_isa)) << "Target isa is not executable.";
+ ASSERT_TRUE(CanExecute(target_isa)) << "Target ISA is not executable " << target_isa;
// Verify on simulator.
if (CodeSimulator::CanSimulate(target_isa)) {
@@ -163,7 +170,7 @@ static void VerifyGeneratedCode(InstructionSet target_isa,
}
// Verify on hardware.
- if (kRuntimeISA == target_isa) {
+ if (CanExecuteOnHardware(target_isa)) {
Expected result = f();
if (has_result) {
ASSERT_EQ(expected, result);