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| author | Nicolas Geoffray <ngeoffray@google.com> | 2016-09-21 16:53:31 +0000 |
|---|---|---|
| committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2016-09-21 16:53:32 +0000 |
| commit | be0f728348139a9185b08d4d5c5adfa806bee00b (patch) | |
| tree | 64e30afc9e2951679c372f1e14f23b10002dabfe /compiler/optimizing/codegen_test.cc | |
| parent | ce092d0e374107fc7416416848d3f232233f84ee (diff) | |
| parent | 7863a2152865a12ad9593d8caad32698264153c1 (diff) | |
Merge "Revert "ARM: VIXL32: Add an initial code generator that passes codegen_tests.""
Diffstat (limited to 'compiler/optimizing/codegen_test.cc')
| -rw-r--r-- | compiler/optimizing/codegen_test.cc | 32 |
1 files changed, 0 insertions, 32 deletions
diff --git a/compiler/optimizing/codegen_test.cc b/compiler/optimizing/codegen_test.cc index f19faa324c..070cbb3894 100644 --- a/compiler/optimizing/codegen_test.cc +++ b/compiler/optimizing/codegen_test.cc @@ -41,7 +41,6 @@ #include "register_allocator_linear_scan.h" #include "ssa_liveness_analysis.h" #include "utils.h" -#include "utils/arm/assembler_arm_vixl.h" #include "utils/arm/managed_register_arm.h" #include "utils/mips/managed_register_mips.h" #include "utils/mips64/managed_register_mips64.h" @@ -49,7 +48,6 @@ #ifdef ART_ENABLE_CODEGEN_arm #include "code_generator_arm.h" -#include "code_generator_arm_vixl.h" #endif #ifdef ART_ENABLE_CODEGEN_arm64 @@ -119,28 +117,6 @@ class TestCodeGeneratorARM : public arm::CodeGeneratorARM { blocked_register_pairs_[arm::R6_R7] = false; } }; - -// A way to test the VIXL32-based code generator on ARM. This will replace -// TestCodeGeneratorARM when the VIXL32-based backend replaces the existing one. -class TestCodeGeneratorARMVIXL : public arm::CodeGeneratorARMVIXL { - public: - TestCodeGeneratorARMVIXL(HGraph* graph, - const ArmInstructionSetFeatures& isa_features, - const CompilerOptions& compiler_options) - : arm::CodeGeneratorARMVIXL(graph, isa_features, compiler_options) { - AddAllocatedRegister(Location::RegisterLocation(arm::R6)); - AddAllocatedRegister(Location::RegisterLocation(arm::R7)); - } - - void SetupBlockedRegisters() const OVERRIDE { - arm::CodeGeneratorARMVIXL::SetupBlockedRegisters(); - blocked_core_registers_[arm::R4] = true; - blocked_core_registers_[arm::R6] = false; - blocked_core_registers_[arm::R7] = false; - // Makes pair R6-R7 available. - blocked_register_pairs_[arm::R6_R7] = false; - } -}; #endif #ifdef ART_ENABLE_CODEGEN_x86 @@ -320,13 +296,6 @@ CodeGenerator* create_codegen_arm(HGraph* graph, const CompilerOptions& compiler *features_arm.get(), compiler_options); } - -CodeGenerator* create_codegen_arm_vixl32(HGraph* graph, const CompilerOptions& compiler_options) { - std::unique_ptr<const ArmInstructionSetFeatures> features_arm( - ArmInstructionSetFeatures::FromCppDefines()); - return new (graph->GetArena()) - TestCodeGeneratorARMVIXL(graph, *features_arm.get(), compiler_options); -} #endif #ifdef ART_ENABLE_CODEGEN_arm64 @@ -382,7 +351,6 @@ static ::std::vector<CodegenTargetConfig> GetTargetConfigs() { #ifdef ART_ENABLE_CODEGEN_arm CodegenTargetConfig(kArm, create_codegen_arm), CodegenTargetConfig(kThumb2, create_codegen_arm), - CodegenTargetConfig(kArm, create_codegen_arm_vixl32), #endif #ifdef ART_ENABLE_CODEGEN_arm64 CodegenTargetConfig(kArm64, create_codegen_arm64), |