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authorAlexandre Rames <alexandre.rames@arm.com>2014-10-27 14:00:51 +0000
committerNicolas Geoffray <ngeoffray@google.com>2014-10-29 19:21:54 +0000
commit42d641bfd9ef3c03c68177b2a429b20056670d86 (patch)
tree8b19599c5c293ac1a7b8a6d5d9b56c8e7385c2fe /compiler/optimizing/codegen_test.cc
parent560473c74cc3755b652f86a61039e4a12c08afe2 (diff)
Opt compiler: Add ARM64 support for the Mul IR.
Also disable compilation and use of the boot image with the optimizing compiler: this won't work with the way we're bringing up arm64 and we need to find a better solution. Bug: 18147756 Change-Id: I6ec0de73681f9226d095bc3db92338dbd46499aa
Diffstat (limited to 'compiler/optimizing/codegen_test.cc')
-rw-r--r--compiler/optimizing/codegen_test.cc8
1 files changed, 0 insertions, 8 deletions
diff --git a/compiler/optimizing/codegen_test.cc b/compiler/optimizing/codegen_test.cc
index 03951e29dd..803a09b733 100644
--- a/compiler/optimizing/codegen_test.cc
+++ b/compiler/optimizing/codegen_test.cc
@@ -408,11 +408,7 @@ MUL_TEST(INT, MulInt);
MUL_TEST(LONG, MulLong);
#endif
-#if defined(__aarch64__)
-TEST(CodegenTest, DISABLED_ReturnMulIntLit8) {
-#else
TEST(CodegenTest, ReturnMulIntLit8) {
-#endif
const uint16_t data[] = ONE_REGISTER_CODE_ITEM(
Instruction::CONST_4 | 4 << 12 | 0 << 8,
Instruction::MUL_INT_LIT8, 3 << 8 | 0,
@@ -421,11 +417,7 @@ TEST(CodegenTest, ReturnMulIntLit8) {
TestCode(data, true, 12);
}
-#if defined(__aarch64__)
-TEST(CodegenTest, DISABLED_ReturnMulIntLit16) {
-#else
TEST(CodegenTest, ReturnMulIntLit16) {
-#endif
const uint16_t data[] = ONE_REGISTER_CODE_ITEM(
Instruction::CONST_4 | 4 << 12 | 0 << 8,
Instruction::MUL_INT_LIT16, 3,