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| author | Artem Serov <artem.serov@linaro.org> | 2017-04-10 17:41:46 +0100 |
|---|---|---|
| committer | Artem Serov <artem.serov@linaro.org> | 2017-04-20 00:21:29 +0100 |
| commit | f34dd206d0073fb3949be872224420a8488f551f (patch) | |
| tree | b24b451af6efdd9f67c4cbd5c37ebb4ec6a4aaad /compiler/optimizing/code_generator_vector_mips.cc | |
| parent | 1f56cb5c594f5757085820b1042988d10f02bb0b (diff) | |
ARM64: Support MultiplyAccumulate for SIMD.
Test: test-art-host, test-art-target.
Change-Id: I06af8415e15352d09d176cae828163cbe99ae7a7
Diffstat (limited to 'compiler/optimizing/code_generator_vector_mips.cc')
| -rw-r--r-- | compiler/optimizing/code_generator_vector_mips.cc | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/compiler/optimizing/code_generator_vector_mips.cc b/compiler/optimizing/code_generator_vector_mips.cc index 8ea1ca7d90..c4a32252d9 100644 --- a/compiler/optimizing/code_generator_vector_mips.cc +++ b/compiler/optimizing/code_generator_vector_mips.cc @@ -245,6 +245,14 @@ void InstructionCodeGeneratorMIPS::VisitVecUShr(HVecUShr* instruction) { LOG(FATAL) << "No SIMD for " << instruction->GetId(); } +void LocationsBuilderMIPS::VisitVecMultiplyAccumulate(HVecMultiplyAccumulate* instr) { + LOG(FATAL) << "No SIMD for " << instr->GetId(); +} + +void InstructionCodeGeneratorMIPS::VisitVecMultiplyAccumulate(HVecMultiplyAccumulate* instr) { + LOG(FATAL) << "No SIMD for " << instr->GetId(); +} + void LocationsBuilderMIPS::VisitVecLoad(HVecLoad* instruction) { LOG(FATAL) << "No SIMD for " << instruction->GetId(); } |