Add support for float-to-int in the optimizing compiler.

- Add support for the float-to-int Dex instruction in the
  optimizing compiler.
- Factor type conversion related lines in
  compiler/optimizing/builder.cc.
- Generate x86, x86-64 and ARM (but not ARM64) code for
  float to int HTypeConversion nodes.
- Add related tests to test/422-type-conversion.

Change-Id: I2382dfc04bf394ed75f675148cfcf98216d65bc6

1 files changed, 15 insertions, 1 deletions

diff --git a/compiler/optimizing/code_generator_arm.cc b/compiler/optimizing/code_generator_arm.cc
index 5b2be2e9a1..448a5a0707 100644
--- a/compiler/optimizing/code_generator_arm.cc
+++ b/compiler/optimizing/code_generator_arm.cc
@@ -1406,6 +1406,12 @@ void LocationsBuilderARM::VisitTypeConversion(HTypeConversion* conversion) {
           break;
 
         case Primitive::kPrimFloat:
+          // Processing a Dex `float-to-int' instruction.
+          locations->SetInAt(0, Location::RequiresFpuRegister());
+          locations->SetOut(Location::RequiresRegister());
+          locations->AddTemp(Location::RequiresFpuRegister());
+          break;
+
         case Primitive::kPrimDouble:
           LOG(FATAL) << "Type conversion from " << input_type
                      << " to " << result_type << " not yet implemented";
@@ -1580,7 +1586,15 @@ void InstructionCodeGeneratorARM::VisitTypeConversion(HTypeConversion* conversio
           }
           break;
 
-        case Primitive::kPrimFloat:
+        case Primitive::kPrimFloat: {
+          // Processing a Dex `float-to-int' instruction.
+          SRegister temp = locations->GetTemp(0).AsFpuRegisterPairLow<SRegister>();
+          __ vmovs(temp, in.AsFpuRegister<SRegister>());
+          __ vcvtis(temp, temp);
+          __ vmovrs(out.AsRegister<Register>(), temp);
+          break;
+        }
+
         case Primitive::kPrimDouble:
           LOG(FATAL) << "Type conversion from " << input_type
                      << " to " << result_type << " not yet implemented";