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| author | Artem Serov <artem.serov@linaro.org> | 2019-07-31 18:28:00 +0100 |
|---|---|---|
| committer | Treehugger Robot <treehugger-gerrit@google.com> | 2020-04-17 10:35:45 +0000 |
| commit | c8150b5def82058c23df377a5006a78e7668afeb (patch) | |
| tree | 8f0e15b91cd55b978ca7f152206f0a550353810a /compiler/optimizing/code_generator.h | |
| parent | b2028739a2db03623ed76f5028ede1333c48f4c9 (diff) | |
ART: Refactor SIMD slots and regs size processing.
ART vectorizer assumes that there is single size of SIMD
register used for the whole program. Make this assumption explicit
and refactor the code.
Note: This is a base for the future introduction of SIMD slots of
size other than 8 or 16 bytes.
Test: test-art-target, test-art-host.
Change-Id: Id699d5e3590ca8c655ecd9f9ed4e63f49e3c4f9c
Diffstat (limited to 'compiler/optimizing/code_generator.h')
| -rw-r--r-- | compiler/optimizing/code_generator.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/compiler/optimizing/code_generator.h b/compiler/optimizing/code_generator.h index 9e3e454f3d..84bf4914d0 100644 --- a/compiler/optimizing/code_generator.h +++ b/compiler/optimizing/code_generator.h @@ -235,6 +235,8 @@ class CodeGenerator : public DeletableArenaObject<kArenaAllocCodeGenerator> { // Get FP register width required to be preserved by the target ABI. virtual size_t GetCalleePreservedFPWidth() const = 0; + // Get the size of the target SIMD register in bytes. + virtual size_t GetSIMDRegisterWidth() const = 0; virtual uintptr_t GetAddressOf(HBasicBlock* block) = 0; void InitializeCodeGeneration(size_t number_of_spill_slots, size_t maximum_safepoint_spill_size, |