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authorRoland Levillain <rpl@google.com>2015-11-17 19:35:12 +0000
committerRoland Levillain <rpl@google.com>2015-11-17 19:35:12 +0000
commit3b359c71f2fb784589be113206932e76807787bb (patch)
treef50f1b98a2948668d2ffabc42ce0cd9a00cecd0c /compiler/common_compiler_test.h
parenta04f57badca0a9211d45eb7bde44c1d1e8f159ff (diff)
ARM read barrier support for concurrent GC in Optimizing.
This first implementation uses slow paths to instrument heap reference loads and GC root loads for the concurrent copying collector, respectively calling the artReadBarrierSlow and artReadBarrierForRootSlow runtime entry points. Notes: - This implementation does not instrument HInvokeVirtual nor HInvokeInterface instructions (for class reference loads), as the corresponding read barriers are not stricly required with the current concurrent copying collector. - Intrinsics which may eventually call (on slow path) are disabled when read barriers are enabled, as the current slow path infrastructure does not support this case. - When read barriers are enabled, the code generated for a HArraySet instruction always go into the array set slow path for object arrays (delegating the operation to the runtime), as we are lacking a mechanism to keep a temporary register live accross a runtime call (needed for the instrumentation of type checking code, which requires two successive read barriers). Bug: 12687968 Change-Id: I92e8db414d029f952c07f3d3a98069e46dfdbc2a
Diffstat (limited to 'compiler/common_compiler_test.h')
-rw-r--r--compiler/common_compiler_test.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/compiler/common_compiler_test.h b/compiler/common_compiler_test.h
index a121f8b7a0..7b0e5af246 100644
--- a/compiler/common_compiler_test.h
+++ b/compiler/common_compiler_test.h
@@ -128,6 +128,7 @@ class CommonCompilerTest : public CommonRuntimeTest {
#define TEST_DISABLED_FOR_READ_BARRIER_WITH_OPTIMIZING_FOR_UNSUPPORTED_INSTRUCTION_SETS() \
if (kUseReadBarrier && GetCompilerKind() == Compiler::kOptimizing) { \
switch (GetInstructionSet()) { \
+ case kThumb2: \
case kX86: \
case kX86_64: \
/* Instruction set has read barrier support. */ \