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2015-01-30Implement LICM in optimizing compiler.Nicolas Geoffray
Change-Id: I9c8afb0a58ef45e568576015473cbfd5f011c242
2015-01-27ART: Further refactor use listsDavid Brazdil
Change-Id: I9e3219575a508ca5141d851bfcaf848302480c32
2015-01-26Optimizing: Speed up HEnvironment use removalDavid Brazdil
Removal of use records from HEnvironment vregs involved iterating over potentially large linked lists which made compilation of huge methods very slow. This patch turns use lists into doubly-linked lists, stores pointers to the relevant nodes inside HEnvironment and subsequently turns the removals into constant-time operations. Change-Id: I0e1d4d782fd624e7b8075af75d4adf0a0634a1ee
2015-01-21Merge "ART: Replace NULL to nullptr in the optimizing compiler"Roland Levillain
2015-01-21ART: Replace NULL to nullptr in the optimizing compilerJean Christophe Beyler
Replace macro NULL to the nullptr variation for C++. Change-Id: Ib6e48dd4bb3c254343383011b67372622578ca76 Signed-off-by: Jean Christophe Beyler <jean.christophe.beyler@intel.com>
2015-01-21Revert "Revert "Fully support pairs in the register allocator.""Nicolas Geoffray
This reverts commit c399fdc442db82dfda66e6c25518872ab0f1d24f. Change-Id: I19f8215c4b98f2f0827e04bf7806c3ca439794e5
2015-01-21Revert "Fully support pairs in the register allocator."Nicolas Geoffray
Libcore tests fail. This reverts commit 41aedbb684ccef76ff8373f39aba606ce4cb3194. Change-Id: I2572f120d4bbaeb7a4d4cbfd47ab00c9ea39ac6c
2015-01-21Fully support pairs in the register allocator.Nicolas Geoffray
Enabled on ARM for longs and doubles. Change-Id: Id8792d08bd7ca9fb049c5db8a40ae694bafc2d8b
2015-01-08Merge "ART: Fixed formatting in HGraphVisualizerPrinter"David Brazdil
2015-01-08ART: Fixed formatting in HGraphVisualizerPrinterDavid Brazdil
Change-Id: I06d9bb0fc03e13cfc49f2b4da07a0ee2d09a339a
2015-01-08Implement double and float support for arm in register allocator.Nicolas Geoffray
The basic approach is: - An instruction that needs two registers gets two intervals. - When allocating the low part, we also allocate the high part. - When splitting a low (or high) interval, we also split the high (or low) equivalent. - Allocation follows the (S/D register) requirement that low registers are always even and the high equivalent is low + 1. Change-Id: I06a5148e05a2ffc7e7555d08e871ed007b4c2797
2014-12-29ART: Refactored VisualizerPrinter visitor patternDavid Brazdil
This patch refactors the visitor pattern in HGraphVisualizerPrinter to output instruction-specific details. Change-Id: Icfed9cd844b973025337a6bb584e1bc88f1ddd58
2014-12-17ART: Added Checker, a pattern matching test engineDavid Brazdil
This patch adds a Python script which implements a domain-specific mini-language similar to that of LLVM's FileCheck. It is primarily intended for writing tests for the optimizing compiler but could be configured for other use cases too. It is implemented from scratch in order to avoid dependency on LLVM. Checker tests are written in Java and dex2oat is invoked with a flag which dumps the CFG before and after each pass of the optimizing compiler. The output is then compared against assertions in the test's comments parsed by Checker. See comments in tools/checker.py for more details about the currently supported language features. This initial CL implements only one type of assertion - whether the output contains lines matching a desired pattern in the given order - but supports both plain text and regex matching and allows for equivalency testing by matching for the outcome of a previous match. See the tests in compiler/optimizing/test/ConstantFolding.java for examples. Change-Id: I1ad7431b399c38dc0391ccee74d2c643ba0b0675
2014-12-15Inlining support in optimizing.Nicolas Geoffray
Currently only inlines simple things that don't require an environment, such as: - Returning a constant. - Returning a parameter. - Returning an arithmetic operation. Change-Id: Ie844950cb44f69e104774a3cf7a8dea66bc85661
2014-10-21Implement register allocator for floating point registers.Nicolas Geoffray
Also: - Fix misuses of emitting the rex prefix in the x86_64 assembler. - Fix movaps code generation in the x86_64 assembler. Change-Id: Ib6dcf6e7c4a9c43368cfc46b02ba50f69ae69cbe
2014-10-17Revert "Revert "Introduce a class to implement optimization passes.""Roland Levillain
This reverts commit 1ddbf6d4b37979a9f11a203c12befd5ae8b65df4. Change-Id: I110a14668d1564ee0604dc958b91394b40da89fc
2014-10-09Stop converting from Location to ManagedRegister.Nicolas Geoffray
Now the source of truth is the Location object that knows which register (core, pair, fpu) it needs to refer to. Change-Id: I62401343d7479ecfb24b5ed161ec7829cda5a0b1
2014-10-06Add a prepare for register allocation pass.Nicolas Geoffray
- Currently the pass just changes the uses of checks to the actual values. - Also optimize array access, now that inputs can be constants. - And fix another bug in the register allocator reveiled by this change. Change-Id: I43be0dbde9330ee5c8f9d678de11361292d8bd98
2014-10-01Revert "Introduce a class to implement optimization passes."Nicolas Geoffray
This reverts commit bf9cd7ba2118a75f5aa9b56241c4d5fa00dedeb8. Change-Id: I0a483446666c9c24c45925a5fc199debdefd8b3e
2014-10-01Introduce a class to implement optimization passes.Roland Levillain
- Add art::HOptimization. - Rename art::ConstantPropagation to art::HConstantFolding in compiler/optimizing/constant_folding.h to avoid name clashes with a class of the same name in compiler/dex/post_opt_passes.h. - Rename art::DeadCodeElimination to art::HDeadCodeElimination for consistency reasons. - Have art::HDeadCodeElimination and art::HConstantFolding derive from art::HOptimization. - Start to use these optimizations in art:OptimizingCompiler::TryCompile. Change-Id: Iaab350c122d87b2333b3760312b15c0592d7e010
2014-09-23Fix code generation with materialized conditions.Nicolas Geoffray
Change-Id: I8630af3c13fc1950d3fa718d7488407b00898796
2014-09-18Small fixes to get the boot image compiled in debug mode.Nicolas Geoffray
Change-Id: Id697737a1bcfb87f407d707e2ddd4f50a77caf26
2014-07-21Add assembly operations with constants in optimizing compiler.Nicolas Geoffray
Change-Id: I5bcc35ab50d4457186effef5592a75d7f4e5b65f
2014-07-02Support longs in the register allocator for x86_64.Nicolas Geoffray
Change-Id: I7fb6dfb761bc5cf9e5705682032855a0a70ca867
2014-06-12Final CL to enable register allocation on x86.Nicolas Geoffray
This CL implements: 1) Resolution after allocation: connecting the locations allocated to an interval within a block and between blocks. 2) Handling of fixed registers: some instructions require inputs/output to be at a specific location, and the allocator needs to deal with them in a special way. 3) ParallelMoveResolver::EmitNativeCode for x86. Change-Id: I0da6bd7eb66877987148b87c3be6a983b4e3f858
2014-05-26Add a linear scan register allocator to the optimizing compiler.Nicolas Geoffray
This is a "by-the-book" implementation. It currently only deals with allocating registers, with no hint optimizations. The changes remaining to make it functional are: - Allocate spill slots. - Resolution and placements of Move instructions. - Connect it to the code generator. Change-Id: Ie0b2f6ba1b98da85425be721ce4afecd6b4012a4
2014-05-19Build live ranges in preparation for register allocation.Nicolas Geoffray
Change-Id: I7ae24afaa4e49276136bf34f4ba7d62db7f28c01
2014-05-16Linearize the graph before creating live ranges.Nicolas Geoffray
Change-Id: I02eb5671e3304ab062286131745c1366448aff58
2014-05-14Add a compilation tracing mechanism to the new compiler.Nicolas Geoffray
Code mostly imported from: https://android-review.googlesource.com/#/c/81653/. Change-Id: I150fe942be0fb270e03fabb19032180f7a065d13
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