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path: root/compiler/optimizing/code_generator_mips.cc
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2017-05-16Remove LoadString/Class kind kBootImageLinkTimeAddress.Vladimir Marko
We no longer support non-PIC boot image compilation. Also clean up some obsolete code for method patches and make JIT correctly report itself as non-PIC. Test: testrunner.py --host Test: testrunner.py --target Bug: 33192586 Change-Id: I593289c5c1b0e88b82b86a933038be97bbb15ad2
2017-05-12MIPS: Drop unnecessary code for R6 (NAN2008)Lena Djokic
The latest MIPS64R6 emulator supports NAN2008 standard (it correctly sets FCSR.NAN2008 to 1 as it is required from R6). Because of that, many workarounds can be removed. This simplifies code generator and intrinsics. Test: ./testrunner.py --target --optimizing in QEMU for MIPS64R6 Test: ./testrunner.py --target --optimizing in QEMU for MIPS32R6 Test: ./testrunner.py --target --optimizing in QEMU for MIPS32R2 Change-Id: Ib5335835b61f55690ff574bca580ea8f809657bb
2017-05-11Clean up some uses of "auto".Vladimir Marko
Make actual types more explicit, either by replacing "auto" with actual type or by assigning std::pair<> elements of an "auto" variable to typed variables. Avoid binding const references to temporaries. Avoid copying a container. Test: m test-art-host-gtest Change-Id: I1a59f9ba1ee15950cacfc5853bd010c1726de603
2017-05-10Merge "Add runtime reasons for deopt."Nicolas Geoffray
2017-05-10Add runtime reasons for deopt.Nicolas Geoffray
Currently to help investigate. Also: 1) Log when deoptimization happens (which method and what reason) 2) Trace when deoptimization happens (to make it visible in systrace) bug:37655083 Test: test-art-host test-art-target Change-Id: I0c2d87b40db09e8e475cf97a7c784a034c585e97
2017-05-08Merge "MIPS32: Implement branchless HCondition for longs"Treehugger Robot
2017-05-04Merge "MIPS: Change remaining entrypoints to save everything."Treehugger Robot
2017-05-02optimizing: constructor fence redundancy elimination - remove dmb after LSEIgor Murashkin
Part one of a few upcoming CLs to optimize constructor fences. This improves load-store-elimination; all singleton objects that are not returned will have their associated constructor fence removed. If the allocation is removed, so is the fence. Even if allocation is not removed, fences can sometimes be removed. This change is enabled by tracking the "this" object associated with the constructor fence as an input. Fence inputs are considered weak; they do not keep the "this" object alive; if the instructions for "this" are all deleted, the fence can also be deleted. Bug: 36656456 Test: art/test.py --host && art/test.py --target Change-Id: I05659ab07e20d6e2ecd4be051b722726776f4ab1
2017-04-30MIPS: Change remaining entrypoints to save everything.Alexey Frunze
This also fixes two issues: 1. Missing restore of the callee-clobbered gp register on MIPS32 2. Incorrect DCHECK causing test 916-obsolete-jit to fail on MIPS32 in the ART_READ_BARRIER_TYPE=TABLELOOKUP configuration Test: booted MIPS32R2 in QEMU Test: test-art-target-gtest Test: testrunner.py --target --optimizing Test: booted MIPS64 (with 2nd arch MIPS32R2) in QEMU Test: same tests as above for both MIPS32R6 and MIPS64R6 Test: repeat all of the above in two configurations: ART_READ_BARRIER_TYPE=TABLELOOKUP, ART_USE_READ_BARRIER=false. Change-Id: I06a3c24579242a632ec8c373c233217d558a8401
2017-04-10MIPS: Use Lsa/Dlsa when possible.Chris Larsen
For MIPS32R6 replace instances of "sll/addu" to calculate the address of an item in an array with "lsa". For other versions of MIPS32 use the "sll/addu" sequence. Encapsulate this logic in an assembler method to eliminate having a lot of statements like "if (IsR6()) { ... } else { ... }" scattered throughout the code. MIPS64 always supports R6. This means that all instances of "dsll/daddu" used to calculate the address of an item in an array can be replaced by "dlsa" so there is no need to encapsulate conditional logic in a special method. The code can just emit "dlsa" directly. Test: mma -j2 ART_TEST_OPTIMIZING=true test-art-target-run-test Tested on MIPS32, and MIPS64 QEMU. Test: "make test-art-target-gtest32" on CI20 board. Test: "cd art; test/testrunner/testrunner.py --target --optimizing --32" on CI20 board. Change-Id: Ibe5facc1bc2a6a7a6584e23d3a48e163ae38077d
2017-03-28MIPS: Implement read barriers.Alexey Frunze
This is the core functionality. Further improvements will be done separately. This also adds/moves memory barriers where they belong and removes the UnsafeGetLongVolatile and UnsafePutLongVolatile MIPS32 intrinsics as they need to load/store a pair of registers atomically, which is not supported directly by the CPU. Test: booted MIPS32R2 in QEMU Test: test-art-target-run-test Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: "testrunner.py --target --optimizing -j1" Test: same MIPS64 boot/test with ART_READ_BARRIER_TYPE=TABLELOOKUP Test: "testrunner.py --target --optimizing --32 -j2" on CI20 Test: same CI20 test with ART_READ_BARRIER_TYPE=TABLELOOKUP Change-Id: I0ff91525fefba3ec1cc019f50316478a888acced
2017-03-09Merge "Remove --include-patch-information option from dex2oat."Richard Uhler
2017-03-08Merge "MIPS: Optimize code generation of check-cast and instance-of."Treehugger Robot
2017-03-08Remove --include-patch-information option from dex2oat.Richard Uhler
Because we no longer support running patchoat on npic oat files, which means the included patch information is unused . Bug: 33192586 Test: m test-art-host Change-Id: I9e100c4e47dc24d91cd74226c84025e961d30f67
2017-03-08MIPS32: Implement branchless HCondition for longsTijana Jakovljevic
Test: booted MIPS32 in QEMU Test: mma test-art-target-run-test Test: mma test-art-target-gtest-codegen_test Change-Id: Ie4eac862fa5577905db9f3f0746c2f7dc58f7a2b
2017-03-03MIPS64: Refactor implicit null checks in array/field get/setTijana Jakovljevic
Rationale: on MIPS64 64-bit loads and stores may be performed as pairs of 32-bit loads/stores. Implicit null checks must be associated with the first 32-bit load/store in a pair and not the last. This change ensures proper association of said checks (a few were done after the last 32-bit load/store in a pair) and lays ground for further improvements in array/field get/set. Additionally ported to MIPS32. Test: mma test-art-target-run-test in QEMU Test: mma test-art-host-gtest Change-Id: If2612df62c21522959e69c637a36cc4ea962a32e
2017-03-01MIPS: Optimize code generation of check-cast and instance-of.Alexey Frunze
This is in preparation for read barrier support. Test: test-art-host-gtest Test: booted MIPS32R2 in QEMU Test: test-art-target Test: booted MIPS64 (with 2nd arch MIPS32R2) in QEMU Test: test-art-target (MIPS64R6 only) Note: built with ART_HEAP_POISONING=true. Change-Id: I072ad41944a5ef390c81458c0ba49a71684cb2a9
2017-02-22MIPS: Implement heap poisoning in ART's Optimizing compiler.Alexey Frunze
This is in preparation for read barrier support. Bug: 12687968 Test: test-art-host-gtest Test: booted MIPS32R2 in QEMU Test: test-art-target Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: test-art-target (both MIPS64R6 and MIPS32R6) Note: built with ART_HEAP_POISONING=true. Change-Id: I0e6e04ff8de2fc8ca6126388409fa218e6920734
2017-02-13String Compression for MIPS32 and MIPS64Goran Jakovljevic
Changes on intrinsics and Code Generation on MIPS32 and MIPS64 for string compression feature. Testing is done with STRING_COMPRESSION_ENABLED = true (in libcore), mirror::kUseStringCompression = true and STRING_COMPRESSION_FEATURE set to 1. Test: booted MIPS32 and MIPS64 in QEMU Test: mma test-art-target-run-test on CI20 (MIPS32R2) Test: mma test-art-target-run-test in QEMU (MIPS64R6) Change-Id: If50a6b6c0792bfa34d4fdff6bf2c7542211d2689
2017-02-06Merge "Code refactoring around sharpening HLoadClass."Nicolas Geoffray
2017-02-03Code refactoring around sharpening HLoadClass.Nicolas Geoffray
Even if the class is not accessible through the dex cache, we can access it by other means (eg boot class, jit table). So rewrite static field access instruction builder to not bail out if a class cannot be accessed through the dex cache. bug:34966607 test: test-art-host test-art-target Change-Id: I88e4e09951a002b480eb8f271726b56f981291bd
2017-02-01MIPS: Support kJitTableAddress kinds of string/class loads.Alexey Frunze
Also remove a few stale comments. Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: "make -j1 ART_TEST_DEFAULT_COMPILER=false ART_TEST_OPTIMIZING=false ART_TEST_INTERPRETER=false ART_TEST_JIT=true test-art-target-run-test" Test: booted MIPS32R2 in QEMU Change-Id: I8914b8e6594e030f8137e7fface1ae20b6d6b971
2017-01-30MIPS32R6: Improve PC-relative string/class loads and invokes.Alexey Frunze
Use PC-relative addressing on MIPS32R6 instead of HMipsDexCacheArraysBase and allow such PC-relative addressing in presence of irreducible loops. Also save a couple of instructions when handling string and class loads from bss. Test: test-art-host-gtest Test: booted MIPS32R2 in QEMU Test: "make -j1 ART_TEST_DEFAULT_COMPILER=false ART_TEST_OPTIMIZING=true ART_TEST_INTERPRETER=false ART_TEST_JIT=false ART_TEST_PIC_TEST=true test-art-target-run-test" Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: "make -j1 ART_TEST_DEFAULT_COMPILER=false ART_TEST_OPTIMIZING=true ART_TEST_INTERPRETER=false ART_TEST_JIT=false ART_TEST_PIC_TEST=true test-art-target-run-test32" Change-Id: I5d0fcbf271541294a3d4479987d52e2aaff084d9
2017-01-20Compressed native PC for stack mapsMathieu Chartier
Compress native PC based on instruction alignment. This reduces the size of stack maps, boot.oat is 0.4% smaller for arm64. Test: test-art-host, test-art-target, N6P booting Change-Id: I2b70eecabda88b06fa80a85688fd992070d54278
2017-01-19Revert "Revert "Load the array class in the compiler for allocations.""Nicolas Geoffray
This reverts commit fee255039e30c1c3dfc70c426c3d176221c3cdf9. Change-Id: I02b45f9a659d872feeb35df40b42c1be9878413a
2017-01-19Revert "Load the array class in the compiler for allocations."Hiroshi Yamauchi
libcore test fails. This reverts commit cc99df230feb46ba717252f002d0cc2da6828421. Change-Id: I5bac595acd2b240886062e8c1f11f9095ff6a9ed
2017-01-18Load the array class in the compiler for allocations.Nicolas Geoffray
Removing one other dependency for needing to pass the current method, and having dex_cache_resolved_types_ in ArtMethod. oat file increase: - x64: 0.25% - arm32: 0.30% - x86: 0.28% test: test-art-host, test-art-target Change-Id: Ibca4fa00d3e31954db2ccb1f65a584b8c67cb230
2017-01-16Put the resolved class in HLoadClass.Nicolas Geoffray
To avoid repeated lookups in sharpening/rtp/inlining. Test: test-art-host test-art-target Change-Id: I08d0da36a4bb061cdaa490ea2af3a3217a875bbe
2017-01-16Implement HLoadClass/kBssEntry for boot image.Vladimir Marko
Test: m test-art-host Test: m test-art-host with CC Test: m test-art-target on Nexus 9 Test: Nexus 9 boots. Test: Build aosp_mips64-eng Bug: 30627598 Change-Id: I168f24dedd5fb54a1e4215ecafb947ffb0dc3280
2017-01-16Store resolved types for AOT code in .bss.Vladimir Marko
Test: m test-art-host Test: m test-art-target on Nexus 9. Test: Nexus 9 boots. Test: Build aosp_mips64-eng. Bug: 30627598 Bug: 34193123 Change-Id: I8ec60a98eb488cb46ae3ea56341f5709dad4f623
2017-01-16Make runtime call on main for HLoadClass/kDexCacheViaMethod.Vladimir Marko
Remove dependency of the compiled code on types dex cache array in preparation for changing to a hash-based array. Test: m test-art-host Test: m test-art-target on Nexus 9 Bug: 30627598 Change-Id: I3c426ed762c12eb9eb4bb61ea9a23a0659abf0a2
2017-01-16Remove HLoadClass::LoadKind::kDexCachePcRelative.Vladimir Marko
Test: m test-art-host Test: m test-art-target-run-test-552-checker-sharpening Bug: 30627598 Change-Id: Ic809b0f3a8ed0bd4dc7ab67aa64866f9cdff9bdb
2017-01-15Revert "Revert "ART: Compiler support for invoke-polymorphic.""Orion Hodson
This reverts commit 0fb5af1c8287b1ec85c55c306a1c43820c38a337. This takes us back to the original change and attempts to fix the issues encountered: - Adds transition record push/pop around artInvokePolymorphic. - Changes X86/X64 relocations for MacSDK. - Implements MIPS entrypoint for art_quick_invoke_polymorphic. - Corrects size of returned reference in art_quick_invoke_polymorphic on ARM. Bug: 30550796,33191393 Test: art/test/run-test 953 Test: m test-art-run-test Change-Id: Ib6b93e00b37b9d4ab743a3470ab3d77fe857cda8
2017-01-12Revert "Revert "Make object allocation entrypoints only take a class.""Nicolas Geoffray
This reverts commit f7aaacd97881c6924b8212c7f8fe4a4c8721ef53. Change-Id: I6756cd1e6110bb45231f62f5e388f16c044cb145
2017-01-12Merge "Revert "Make object allocation entrypoints only take a class.""Treehugger Robot
2017-01-12Revert "Make object allocation entrypoints only take a class."Hiroshi Yamauchi
960-default-smali64 is failing. This reverts commit 2b615ba29c4dfcf54aaf44955f2eac60f5080b2e. Change-Id: Iebb8ee5a917fa84c5f01660ce432798524d078ef
2017-01-11Merge "Revert "ART: Compiler support for invoke-polymorphic.""Orion Hodson
2017-01-11Revert "ART: Compiler support for invoke-polymorphic."Orion Hodson
This reverts commit 02e3092f8d98f339588e48691db77f227b48ac1e. Reasons for revert: - Breaks MIPS/MIPS64 build. - Fails under GCStress test on x64. - Different x64 build configuration doesn't like relocation. Change-Id: I512555b38165d05f8a07e8aed528f00302061001
2017-01-11Merge "ART: Compiler support for invoke-polymorphic."Treehugger Robot
2017-01-11ART: Compiler support for invoke-polymorphic.Orion Hodson
Adds basic support to invoke method handles in compiled code. Enables method verification for methods containing invoke-polymorphic. Adds k45cc/k45rc output to Instruction::DumpString() which was found to be missing when enabling verification. Include stack traces in test 957-methodhandle-transforms for failures so they can be easily identified. Bug: 30550796,33191393 Test: art/test/run-test 953 Test: m test-art-run-test Change-Id: Ic9a96ea24906087597d96ad8159a5bc349d06950
2017-01-11Merge "Keep resolved String in HLoadString."Nicolas Geoffray
2017-01-11Make object allocation entrypoints only take a class.Nicolas Geoffray
Change motivated by: - Dex cache compression: having the allocation fast path do a dex cache lookup will be too expensive. So instead, rely on the compiler having direct access to the class (either through BSS for AOT, or JIT tables for JIT). - Inlining: the entrypoints relied on the caller of the allocation to have the same dex cache as the outer method (stored at the bottom of the stack). This meant we could not inline methods from a different dex file that do allocations. By avoiding the dex cache lookup in the entrypoint, we can now remove this restriction. Code expansion on average for Docs/Gms/FB/Framework (go/lem numbers): - Around 0.8% on arm64 - Around 1% for x64, arm - Around 1.5% on x86 Test: test-art-host, test-art-target, ART_USE_READ_BARRIER=true/false Test: test-art-host, test-art-target, ART_DEFAULT_GC_TYPE=SS ART_USE_TLAB=true Change-Id: I41f3748bb4d251996aaf6a90fae4c50176f9295f
2017-01-10Keep resolved String in HLoadString.Nicolas Geoffray
For the following reasons: - Avoids needing to do a lookup again in CodeGenerator::EmitJitRoots. - Fixes races where we the string was GC'ed before CodeGenerator::EmitJitRoots. - Makes it possible to do GVN on the same string but defined in different dex files. Test: test-art-host, test-art-target Change-Id: If2b5d3079f7555427b1b96ab04546b3373fcf921
2016-12-26MIPS32: Don't always do a null test in MarkGCCardGoran Jakovljevic
Test: mma test-art-target-run-test on CI20 Change-Id: I38fac492bb76b06b9cffc9be16944fb22ed2db70
2016-12-20Remove soon to be obsolete call kinds for direct calls.Nicolas Geoffray
And remove CompilerDriver::GetCodeAndMethodForDirectCall in preparation of removing non-PIC prebuild and non-PIC on-device boot image compilation. Test: test-art-host test-art-target bug:33192586 Change-Id: Ic48e3e8b9d7605dd0e66f31d458a182198ba9578
2016-12-19MIPS64: Improve string and class loads.Alexey Frunze
This adds most kinds of string/class loads. JIT string/class loads are TBD separately. This also fixes Mips64Assembler::LoadLabelAddress() (adding a constant to a 64-bit address must be done using daddiu, not addiu). Test: test-art-host-gtest Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: "make -j1 ART_TEST_DEFAULT_COMPILER=false ART_TEST_OPTIMIZING=true ART_TEST_INTERPRETER=false ART_TEST_JIT=false ART_TEST_PIC_TEST=true test-art-target-run-test64" Change-Id: I1f94ece4cd202382c11167e1ed958e9d08d92822
2016-12-14Implement VisitShouldDeoptimizeFlag for MIPS/MIPS64Goran Jakovljevic
This is follow-up change for I18bf716a601b6413b46312e925a6ad9e4008efa4. Test: mma ART_TEST_JIT=true test-art-target-run-test-jit on CI20 and QEMU Change-Id: I750814ae740a4549f1a2af11be7ae4318ae26a2f
2016-12-12Revert "Revert "Add kJitTableAddress for HLoadClass.""Nicolas Geoffray
This reverts commit d2d5262c8370309e1f2a009f00aafc24f1cf00a0. Change-Id: I6149d5c7d5df0b0fc5cb646a802a2eea8d01ac08
2016-12-12Merge "Revert "Add kJitTableAddress for HLoadClass.""Nicolas Geoffray
2016-12-12Revert "Add kJitTableAddress for HLoadClass."Nicolas Geoffray
One test failure after merge. This reverts commit 5b12f7973636bfea29da3956a9baa7a6bbe2b666. Change-Id: I120c49e53274471fc1c82a10d52e99c83f5f85cc
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