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2014-11-13Merge "[optimizing compiler] add HTemporary support for long and doubles"Calin Juravle
2014-11-12[optimizing compiler] add HTemporary support for long and doublesCalin Juravle
Change-Id: I5247ecd71d0193050484b7632c804c9bfd20f924
2014-11-12Do a parallel move in BoundsCheckSlowPath.Nicolas Geoffray
The two locations of the index and length could overlap, so we need a parallel move. Also factorize the code for doing a parallel move based on two locations. Change-Id: Iee8b3459e2eed6704d45e9a564fb2cd050741ea4
2014-11-10Merge "Support invoke-interface in optimizing."Nicolas Geoffray
2014-11-10Support invoke-interface in optimizing.Nicolas Geoffray
Change-Id: Ic18d7c3d2810557231caf0571956e0c431f5d384
2014-11-07Do not update Out after it has a valid location.Nicolas Geoffray
Slow paths use LocationSummary to know where to move things around, and they are executed at the end of the code generation. This fix is needed for https://android-review.googlesource.com/#/c/113345/. Change-Id: Id336c6409479b1de6dc839b736a7234d08a7774a
2014-11-06Implement try/catch/throw in optimizing.Nicolas Geoffray
- We currently don't run optimizations in the presence of a try/catch. - We therefore implement Quick's mapping table. - Also fix a missing null check on array-length. Change-Id: I6917dfcb868e75c1cf6eff32b7cbb60b6cfbd68f
2014-10-30Merge "Follow-up CL after hard float changes."Nicolas Geoffray
2014-10-29Add support for static fields in optimizing compiler.Nicolas Geoffray
Change-Id: Id2f010589e2bd6faf42c05bb33abf6816ebe9fa9
2014-10-28Follow-up CL after hard float changes.Nicolas Geoffray
Addressing comments from Zheng Xu. Change-Id: I8c599cdfab03373e82a1b90b711005c490bc6ca0
2014-10-27Support hard float on arm in optimizing compiler.Nicolas Geoffray
Also bump oat version, needed after latest hard float switch. Change-Id: Idf5acfb36c07e74acff00edab998419a3c6b2965
2014-10-23ART: optimizing compiler: initial support for ARM64.Alexandre Rames
The ARM64 port uses VIXL for code generation, to which it defers work like label binding and branch resolving, register type coherency checking, and immediate values handling. Change-Id: I0a44508c0c991f472a63e67b3469cdd878fe1a68 Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com> Signed-off-by: Alexandre Rames <alexandre.rames@arm.com>
2014-10-21Implement register allocator for floating point registers.Nicolas Geoffray
Also: - Fix misuses of emitting the rex prefix in the x86_64 assembler. - Fix movaps code generation in the x86_64 assembler. Change-Id: Ib6dcf6e7c4a9c43368cfc46b02ba50f69ae69cbe
2014-10-16Don't use assembler classes in code_generator.h.Nicolas Geoffray
The arm64 backend uses its own assembler and does not share the same classes as the other backends. To avoid conflicts or unnecessary mappings, just don't use those classes in the shared part of the code generator. Change-Id: I9e5fa40c1021d2e83a4ef14c52cd1ccd03f2f73d
2014-10-10Cleanup baseline register allocator.Nicolas Geoffray
- Use three arrays for blocking regsters instead of one and computing offsets in that array.] - Don't pass blocked_registers_ to methods, just use the field. Change-Id: Ib698564c31127c59b5a64c80f4262394b8394dc6
2014-10-09Stop converting from Location to ManagedRegister.Nicolas Geoffray
Now the source of truth is the Location object that knows which register (core, pair, fpu) it needs to refer to. Change-Id: I62401343d7479ecfb24b5ed161ec7829cda5a0b1
2014-10-07Add support for floats and doubles.Nicolas Geoffray
- Follows Quick conventions. - Currently only works with baseline register allocator. Change-Id: Ie4b8e298f4f5e1cd82364da83e4344d4fc3621a3
2014-09-25Optimize suspend checks in optimizing compiler.Nicolas Geoffray
- Remove the ones added during graph build (they were added for the baseline code generator). - Emit them at loop back edges after phi moves, so that the test can directly jump to the loop header. - Fix x86 and x86_64 suspend check by using cmpw instead of cmpl. Change-Id: I6fad5795a55705d86c9e1cb85bf5d63dadfafa2a
2014-09-23Support for saving and restoring live registers in a slow path.Nicolas Geoffray
And use it in suspend check slow paths. Change-Id: I79caf28f334c145a36180c79a6e2fceae3990c31
2014-09-11Fix valgrind errors.Nicolas Geoffray
For now just stack allocate the code generator. Will think about cleaning up the root problem later (CodeGenerator being an arena object). Change-Id: I161a6f61c5f27ea88851b446f3c1e12ee9c594d7
2014-09-08Runtime support for the new stack maps for the opt compiler.Nicolas Geoffray
Now most of the methods supported by the compiler can be optimized, instead of using the baseline. Change-Id: I80ab36a34913fa4e7dd576c7bf55af63594dc1fa
2014-08-15ART source line debug info in OAT filesYevgeny Rouban
OAT files have source line information enough for ART runtime needs like jump to/from interpreter and thread suspension. But this information is not enough for finer grained source level debugging and low-level profiling (VTune or perf). This patch adds to OAT files two additional sections: .debug_line - DWARF formatted Elf32 section with detailed source line information (mapping from native PC to Java source lines). In addition to the debugging symbols added using the dex2oat option --include-debug-symbols, the source line information is added to the section .debug_line. The source line info can be read by many Elf reading tools like objdump, readelf, dwarfdump, gdb, perf, VTune, ... gdb can use this debug line information in x86. In 64-bit mode the information can be used if the oat file is mapped in the lower address space (address has higher 32 bits zeroed). Relocation works. Testing: 1. art/test/run-test --host --gdb [--64] 001-HelloWorld 2. in gdb: break Main.java:19 3. in gdb: break Runtime.java:111 4. in gdb: run - stops at void java.lang.Runtime.<init>() 5. in gdb: backtrace - shows call stack down to main() 6. in gdb: continue - stops at void Main.main() (only in 32-bit mode) 7. in gdb: backtrace - shows call stack down to main() 8. objdump -W <oat-file> - addresses are from VMA range of .text section reported by objdump -h <file> 9. dwarfdump -ka <oat-file> - no errors expected Size of aosp-x86-eng boot.oat increased by 11% from 80.5Mb to 89.2Mb with two sections added .debug_line (7.2Mb) and .rel.debug (1.5Mb). Change-Id: Ib8828832686e49782a63d5529008ff4814ed9cda Signed-off-by: Yevgeny Rouban <yevgeny.y.rouban@intel.com>
2014-07-22Make unit test tell if a method is a leaf.Nicolas Geoffray
The runtime is not initialized completely in gtests, so we cannot run code (such as explicit stack overflow checks) that look at tls values. Change-Id: I74a4449b01eb203f1b411dda700e9459878d0d55
2014-07-22Stack overflow checks and NPE checks for optimizing.Nicolas Geoffray
Change-Id: I59e97448bf29778769b79b51ee4ea43f43493d96
2014-07-15Fix a braino in the stack layout.Nicolas Geoffray
Also do some refactoring to have this code be just in CodeGenerator. Change-Id: I88de109889138af8d60027973c12a64bee813cb7
2014-07-14Support fields in optimizing compiler.Nicolas Geoffray
- Required support for temporaries, to be only used by baseline compiler. - Also fixed a few invalid assumptions around locations and instructions that don't need materialization. These instructions should not have an Out. Change-Id: Idc4a30dd95dd18015137300d36bec55fc024cf62
2014-06-13Add x86_64 support to the optimizing compiler.Nicolas Geoffray
Change-Id: I4462d9ae15be56c4a3dc1bd4d1c0c6548c1b94be
2014-06-12Final CL to enable register allocation on x86.Nicolas Geoffray
This CL implements: 1) Resolution after allocation: connecting the locations allocated to an interval within a block and between blocks. 2) Handling of fixed registers: some instructions require inputs/output to be at a specific location, and the allocator needs to deal with them in a special way. 3) ParallelMoveResolver::EmitNativeCode for x86. Change-Id: I0da6bd7eb66877987148b87c3be6a983b4e3f858
2014-05-14Add a compilation tracing mechanism to the new compiler.Nicolas Geoffray
Code mostly imported from: https://android-review.googlesource.com/#/c/81653/. Change-Id: I150fe942be0fb270e03fabb19032180f7a065d13
2014-05-07Build live-in, live-out and kill sets for each block.Nicolas Geoffray
This information will be used when computing live ranges of instructions. Change-Id: I345ee833c1ccb4a8e725c7976453f6d58d350d74
2014-05-02Make all registers available when allocating an output register.Nicolas Geoffray
On ARM we currently only have two register pairs available, so we need to use one already used for an input. Change-Id: I5411862310009a41e50ddab3549d3a9e9052266a
2014-04-29Setup policies for register allocation.Nicolas Geoffray
Change-Id: I857e77530fca3e2fb872fc142a916af1b48400dc
2014-04-28Add a Transform to SSA phase to the optimizing compiler.Nicolas Geoffray
Change-Id: Ia9700756a0396d797a00b529896487d52c989329
2014-04-08Test control flow instruction with optimizing compiler.Nicolas Geoffray
Add support for basic instructions to implement these tests. Change-Id: I3870bf9301599043b3511522bb49dc6364c9b4c0
2014-04-07Add support for taking parameters in optimizing compiler.Nicolas Geoffray
- Fix stack layout to mimic Quick's. - Implement some sub operations. Change-Id: I8cf75a4d29b662381a64f02c0bc61d859482fc4e
2014-04-04Use target-specific word instead of runtime word.Nicolas Geoffray
Change-Id: Ia11dc3cc520a1a5c7bd017013e5699af9570ce91
2014-04-03Merge "Support passing arguments to invoke-static* instructions."Nicolas Geoffray
2014-04-03Support passing arguments to invoke-static* instructions.Nicolas Geoffray
- Stop using the frame pointer for accessing locals. - Stop emulating a stack when doing code generation. Instead, rely on dex register model, where instructions only reference registers. Change-Id: Id51bd7d33ac430cb87a53c9f4b0c864eeb1006f9
2014-04-03art: Handle x86_64 architecture equal to x86Dmitry Petrochenko
This patch forces FE/ME to treat x86_64 as x86 exactly. The x86_64 logic will be revised later when assembly will be ready. Change-Id: I4a92477a6eeaa9a11fd710d35c602d8d6f88cbb6 Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
2014-03-31Add support for invoke-static in optimizing compiler.Nicolas Geoffray
Support is limited to calls without parameters and returning void. For simplicity, we currently follow the Quick ABI. Change-Id: I54805161141b7eac5959f1cae0dc138dd0b2e8a5
2014-03-19Run Java tests with the optimizing compiler.Nicolas Geoffray
Also fix a vector.reserve -> vector.resize braino, and build a GC map that dex2oat expects. Change-Id: I6acf2f90a4c32f90b79bf7709bf2e43931b98757
2014-03-18Plug new optimizing compiler in compilation pipeline.Nicolas Geoffray
Also rename accessors to ART's conventions. Change-Id: I344807055b98aa4b27215704ec362191464acecc
2014-03-13More code generation for the optimizing compiler.Nicolas Geoffray
- Add HReturn instruction - Generate code for locals/if/return - Setup infrastructure for register allocation. Currently emulate a stack. Change-Id: Ib28c2dba80f6c526177ed9a7b09c0689ac8122fb
2014-03-04Add codegen support to the optimizing compiler.Nicolas Geoffray
Change-Id: I9aae76908ff1d6e64fb71a6718fc1426b67a5c28
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